This commit is contained in:
Vlad
2025-07-28 11:13:06 +03:00
parent abbd7981a9
commit aa36b579a4
3 changed files with 276 additions and 217 deletions

19
.vscode/iar-vsc.json vendored Normal file
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@ -0,0 +1,19 @@
{
"workspace": {
"path": "${workspaceFolder}\\Robot_balancer\\Robot_balancer.eww"
},
"workspaces": {
"${workspaceFolder}\\Robot_balancer\\Robot_balancer.eww": {
"configs": {
"${workspaceFolder}\\Robot_balancer\\ACAR\\ACAR.ewp": "Debug",
"${workspaceFolder}\\Robot_balancer\\PID\\PID.ewp": "Debug"
},
"selected": {
"path": "${workspaceFolder}\\Robot_balancer\\PID\\PID.ewp"
}
}
},
"workbench": {
"path": "C:\\iar\\ewarm-9.60.3"
}
}

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@ -77,12 +77,12 @@
#include "stm32g4xx.h" #include "stm32g4xx.h"
#if !defined (HSE_VALUE) #if !defined(HSE_VALUE)
#define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */ #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */ #endif /* HSE_VALUE */
#if !defined (HSI_VALUE) #if !defined(HSI_VALUE)
#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */ #endif /* HSI_VALUE */
/** /**
@ -114,19 +114,19 @@
in Sram else user remap will be done in Flash. */ in Sram else user remap will be done in Flash. */
/* #define VECT_TAB_SRAM */ /* #define VECT_TAB_SRAM */
#if defined(VECT_TAB_SRAM) #if defined(VECT_TAB_SRAM)
#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field. #define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field. \
This value must be a multiple of 0x200. */ This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. #define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. \
This value must be a multiple of 0x200. */ This value must be a multiple of 0x200. */
#else #else
#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field. #define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field. \
This value must be a multiple of 0x200. */ This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. #define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. \
This value must be a multiple of 0x200. */ This value must be a multiple of 0x200. */
#endif /* VECT_TAB_SRAM */ #endif /* VECT_TAB_SRAM */
#endif /* USER_VECT_TAB_ADDRESS */ #endif /* USER_VECT_TAB_ADDRESS */
/******************************************************************************/ /******************************************************************************/
/** /**
* @} * @}
*/ */
@ -141,18 +141,18 @@
/** @addtogroup STM32G4xx_System_Private_Variables /** @addtogroup STM32G4xx_System_Private_Variables
* @{ * @{
*/ */
/* The SystemCoreClock variable is updated in three ways: /* The SystemCoreClock variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate() 1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq() 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically. variable is updated automatically.
*/ */
uint32_t SystemCoreClock = HSI_VALUE; uint32_t SystemCoreClock = HSI_VALUE;
const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
/** /**
* @} * @}
@ -176,12 +176,55 @@
* @retval None * @retval None
*/ */
void SystemClockInit()
{
// 1. Включаем HSE
RCC->CR |= RCC_CR_HSEON;
while (!(RCC->CR & RCC_CR_HSERDY))
;
// 2. Отключаем PLL
RCC->CR &= ~RCC_CR_PLLON;
while (RCC->CR & RCC_CR_PLLRDY)
;
// 3. Устанавливаем источник PLL — HSE
RCC->PLLCFGR &= ~RCC_PLLCFGR_PLLSRC;
RCC->PLLCFGR |= RCC_PLLCFGR_PLLSRC_HSE;
// 4. Настраиваем PLLM, PLLN, PLLR
RCC->PLLCFGR =
(1U << RCC_PLLCFGR_PLLM_Pos) | // PLLM = 2 (код 1)
(85U << RCC_PLLCFGR_PLLN_Pos) | // PLLN = 85
(0U << RCC_PLLCFGR_PLLR_Pos) | // PLLR = 2 (код 0)
RCC_PLLCFGR_PLLREN | // Включаем PLLR
RCC_PLLCFGR_PLLSRC_HSE; // Источник HSE
// 5. Устанавливаем FLASH задержку (4 такта для 170МГц)
FLASH->ACR |= FLASH_ACR_LATENCY_4WS;
// 6. Включаем PLL
RCC->CR |= RCC_CR_PLLON;
while (!(RCC->CR & RCC_CR_PLLRDY))
;
// 7. Переключаем системную частоту на PLL
RCC->CFGR &= ~RCC_CFGR_SW;
RCC->CFGR |= RCC_CFGR_SW_PLL;
while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL)
;
// 8. Обновляем переменную SystemCoreClock
SystemCoreClockUpdate();
}
void SystemInit(void) void SystemInit(void)
{ {
/* FPU settings ------------------------------------------------------------*/ SystemClockInit();
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) /* FPU settings ------------------------------------------------------------*/
SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
#endif SCB->CPACR |= ((3UL << (10 * 2)) | (3UL << (11 * 2))); /* set CP10 and CP11 Full Access */
#endif
/* Configure the Vector Table location add offset address ------------------*/ /* Configure the Vector Table location add offset address ------------------*/
#if defined(USER_VECT_TAB_ADDRESS) #if defined(USER_VECT_TAB_ADDRESS)
@ -245,7 +288,7 @@ void SystemCoreClockUpdate(void)
SYSCLK = PLL_VCO / PLLR SYSCLK = PLL_VCO / PLLR
*/ */
pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ; pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U;
if (pllsource == 0x02UL) /* HSI used as PLL clock source */ if (pllsource == 0x02UL) /* HSI used as PLL clock source */
{ {
pllvco = (HSI_VALUE / pllm); pllvco = (HSI_VALUE / pllm);
@ -256,7 +299,7 @@ void SystemCoreClockUpdate(void)
} }
pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8); pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U; pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
SystemCoreClock = pllvco/pllr; SystemCoreClock = pllvco / pllr;
break; break;
default: default:
@ -269,7 +312,6 @@ void SystemCoreClockUpdate(void)
SystemCoreClock >>= tmp; SystemCoreClock >>= tmp;
} }
/** /**
* @} * @}
*/ */
@ -281,5 +323,3 @@ void SystemCoreClockUpdate(void)
/** /**
* @} * @}
*/ */

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@ -16,11 +16,11 @@
volatile uint32_t counter = 0; volatile uint32_t counter = 0;
float res; float res;
float u; float u;
extern "C" void TIM2_IRQHandler(void) extern "C" void TIM4_IRQHandler(void)
{ {
if (TIM2->SR & TIM_SR_UIF) // Проверить флаг обновления if (TIM4->SR & TIM_SR_UIF) // Проверить флаг обновления
{ {
TIM2->SR &= ~TIM_SR_UIF; // Сбросить флаг TIM4->SR &= ~TIM_SR_UIF; // Сбросить флаг
counter++; counter++;
@ -59,13 +59,13 @@ int main()
//----------------------------------------------------------------------------------------------------------- //-----------------------------------------------------------------------------------------------------------
GPIOC->BSRR = GPIO_BSRR_BS6; // установка в высокий C6 GPIOC->BSRR = GPIO_BSRR_BS6; // установка в высокий C6
//------------------------------------------------------------------------- ---------------------------------- //------------------------------------------------------------------------- ----------------------------------
RCC->APB1ENR1 |= RCC_APB1ENR1_TIM2EN; // Включить тактирование TIM2 RCC->APB1ENR1 |= RCC_APB1ENR1_TIM4EN; // Включить тактирование TIM2
TIM2->PSC = 16 - 1; // Предделитель 16 МГц / 16 = 1000 кГц TIM4->PSC = 170 - 1; // Предделитель 170 МГц / 170 = 1000 кГц
TIM2->ARR = 1000 - 1; // Автоматическая перезагрузка (0.001 секунда) TIM4->ARR = 1000 - 1; // Автоматическая перезагрузка (0.001 секунда)
TIM2->DIER |= TIM_DIER_UIE; // Разрешить прерывание по обновлению TIM4->DIER |= TIM_DIER_UIE; // Разрешить прерывание по обновлению
TIM2->CR1 |= TIM_CR1_CEN; // Включить таймер TIM4->CR1 |= TIM_CR1_CEN; // Включить таймер
NVIC_EnableIRQ(TIM2_IRQn); NVIC_EnableIRQ(TIM4_IRQn);
NVIC_SetPriority(TIM2_IRQn, 15); // Уровень приоритета NVIC_SetPriority(TIM4_IRQn, 15); // Уровень приоритета
//----------------------------------------------------------------------------------------------------------- //-----------------------------------------------------------------------------------------------------------
GPIOA->OTYPER &= ~GPIO_OTYPER_OT8_Msk; // Сброс режима GPIOA->OTYPER &= ~GPIO_OTYPER_OT8_Msk; // Сброс режима
GPIOC->OTYPER &= ~GPIO_OTYPER_OT11_Msk; // Сброс режима GPIOC->OTYPER &= ~GPIO_OTYPER_OT11_Msk; // Сброс режима
@ -91,11 +91,11 @@ int main()
I2C3->CR1 &= ~I2C_CR1_PE; // Отключение I2C3 I2C3->CR1 &= ~I2C_CR1_PE; // Отключение I2C3
//----------------------------------------------------------------------------------------------------------- //-----------------------------------------------------------------------------------------------------------
// 400 кГц // 400 кГц
I2C3->TIMINGR = (0 << I2C_TIMINGR_PRESC_Pos) | // PRESC=0 (делитель 1) -> I2CCLK=16 МГц I2C3->TIMINGR = (7 << I2C_TIMINGR_PRESC_Pos) | // PRESC=7 -> I2CCLK=21.25 МГц
(3 << I2C_TIMINGR_SCLDEL_Pos) | // SCLDEL=3 -> t_HD;STA=0.25 мкс (8 << I2C_TIMINGR_SCLDEL_Pos) | // SCLDEL=8 -> t_HD;STA=0.38 мкс
(1 << I2C_TIMINGR_SDADEL_Pos) | // SDADEL=1 -> t_HD;DAT=0.0625 мкс (4 << I2C_TIMINGR_SDADEL_Pos) | // SDADEL=4 -> t_HD;DAT=0.019 мкс
(15 << I2C_TIMINGR_SCLH_Pos) | // SCLH=15 -> t_HIGH=1 мкс (16 << I2C_TIMINGR_SCLH_Pos) | // SCLH=16 -> t_HIGH=0.75 мкс
(15 << I2C_TIMINGR_SCLL_Pos); // SCLL=15 -> t_LOW=1 мкс (32 << I2C_TIMINGR_SCLL_Pos); // SCLL=32 -> t_LOW=1.51 мкс
//----------------------------------------------------------------------------------------------------------- //-----------------------------------------------------------------------------------------------------------
I2C3->CR1 |= I2C_CR1_PE; // Включение I2C3 I2C3->CR1 |= I2C_CR1_PE; // Включение I2C3
for (volatile int i = 0; i < 100000; ++i) for (volatile int i = 0; i < 100000; ++i)