diff --git a/Debug/.ninja_deps b/Debug/.ninja_deps index 54a0a45..3ffa1ea 100644 Binary files a/Debug/.ninja_deps and b/Debug/.ninja_deps differ diff --git a/Debug/.ninja_log b/Debug/.ninja_log index da8a3fe..4a3b790 100644 --- a/Debug/.ninja_log +++ b/Debug/.ninja_log @@ -17,3 +17,17 @@ 181 222 7990823776968303 C:/Users/vadychka/Documents/GitHub/leybl/fft/Debug/List/fft_az.map 2a7eadea1e12d4bc 181 222 7990823776968303 C:/Users/vadychka/Documents/GitHub/leybl/fft/Debug/Exe/fft_az.out 2a7eadea1e12d4bc 181 222 7990823776968303 C:/Users/vadychka/Documents/GitHub/leybl/fft/Debug/List/fft_az.map 2a7eadea1e12d4bc +3 145 8008901051719254 C:/Users/vadychka/Documents/GitHub/leybl/fft/Debug/Obj/motors.o a560d5a92deba7a4 +3 145 8008901051719254 C:/Users/vadychka/Documents/GitHub/leybl/fft/Debug/Obj/motors.o a560d5a92deba7a4 +2 153 8008901051709367 C:/Users/vadychka/Documents/GitHub/leybl/fft/Debug/Obj/imu.o c37a5ec274783fe9 +2 153 8008901051709367 C:/Users/vadychka/Documents/GitHub/leybl/fft/Debug/Obj/imu.o c37a5ec274783fe9 +3 166 8008901051719254 C:/Users/vadychka/Documents/GitHub/leybl/fft/Debug/Obj/main.o 26d4f707094ccf1a +3 166 8008901051719254 C:/Users/vadychka/Documents/GitHub/leybl/fft/Debug/Obj/main.o 26d4f707094ccf1a +154 167 8008901053232593 C:/Users/vadychka/Documents/GitHub/leybl/fft/Debug/Obj/startup_stm32g431xx.o cede824c243c8d17 +154 167 8008901053232593 C:/Users/vadychka/Documents/GitHub/leybl/fft/Debug/Obj/startup_stm32g431xx.o cede824c243c8d17 +146 248 8008901053147116 C:/Users/vadychka/Documents/GitHub/leybl/fft/Debug/Obj/system_stm32g4xx.o a638ba64754599fe +146 248 8008901053147116 C:/Users/vadychka/Documents/GitHub/leybl/fft/Debug/Obj/system_stm32g4xx.o a638ba64754599fe +1 147 8008905075728681 C:/Users/vadychka/Documents/GitHub/leybl/fft/Debug/Obj/dsp_manager.o 5e0322b232c2a5d3 +1 147 8008905075728681 C:/Users/vadychka/Documents/GitHub/leybl/fft/Debug/Obj/dsp_manager.o 5e0322b232c2a5d3 +2 163 8008905075738649 C:/Users/vadychka/Documents/GitHub/leybl/fft/Debug/Obj/main.o 26d4f707094ccf1a +2 163 8008905075738649 C:/Users/vadychka/Documents/GitHub/leybl/fft/Debug/Obj/main.o 26d4f707094ccf1a diff --git a/Debug/Exe/fft_az.out b/Debug/Exe/fft_az.out deleted file mode 100644 index 4c976b3..0000000 Binary files a/Debug/Exe/fft_az.out and /dev/null differ diff --git a/Debug/Exe/fft_az.out.rsp b/Debug/Exe/fft_az.out.rsp new file mode 100644 index 0000000..9083d8a --- /dev/null +++ b/Debug/Exe/fft_az.out.rsp @@ -0,0 +1 @@ +C:\Users\vadychka\Documents\GitHub\leybl\fft\Debug\Obj\dsp_manager.o C:\Users\vadychka\Documents\GitHub\leybl\fft\Debug\Obj\imu.o C:\Users\vadychka\Documents\GitHub\leybl\fft\Debug\Obj\main.o C:\Users\vadychka\Documents\GitHub\leybl\fft\Debug\Obj\motors.o C:\Users\vadychka\Documents\GitHub\leybl\fft\Debug\Obj\startup_stm32g431xx.o C:\Users\vadychka\Documents\GitHub\leybl\fft\Debug\Obj\system_stm32g4xx.o --no_out_extension -o C:\Users\vadychka\Documents\GitHub\leybl\fft\Debug\Exe\fft_az.out --redirect _Printf=_PrintfFullNoMb --redirect _Scanf=_ScanfFullNoMb --map C:\Users\vadychka\Documents\GitHub\leybl\fft\Debug\List\fft_az.map --config C:\iar\ewarm-9.70.1\arm/config/linker/ST/stm32g431xB.icf --semihosting --entry __iar_program_start C:\iar\ewarm-9.70.1\arm\CMSIS\Lib\IAR\iar_cortexM4lf_math.a --vfe --text_out locale --cpu=Cortex-M4 --fpu=VFPv4_sp \ No newline at end of file diff --git a/Debug/List/fft_az.map b/Debug/List/fft_az.map index 3115729..c80f2e3 100644 --- a/Debug/List/fft_az.map +++ b/Debug/List/fft_az.map @@ -1,6 +1,6 @@ ############################################################################### # -# IAR ELF Linker V9.70.1.475/W64 for ARM 28/Apr/2026 15:26:17 +# IAR ELF Linker V9.70.1.475/W64 for ARM 19/May/2026 13:41:59 # Copyright 2007-2025 IAR Systems AB. # # Output file = @@ -32,6 +32,21 @@ # ############################################################################### +******************************************************************************* +*** MESSAGES +*** + +Error[Li005]: no definition for "Biquad_Filter" [referenced from + C:\Users\vadychka\Documents\GitHub\leybl\fft\Debug\Obj\dsp_manager.o] +Error[Li005]: no definition for "dsp_buffer_ready" [referenced from + C:\Users\vadychka\Documents\GitHub\leybl\fft\Debug\Obj\dsp_manager.o] +Error[Lp011]: section placement failed + unable to allocate space for sections/blocks with a total estimated + minimum size of 0x1'fe48 bytes (max align 0x4) in + <[0x800'0000-0x801'ffff]> (total uncommitted space + 0x1'fe28). + + ******************************************************************************* *** RUNTIME MODEL ATTRIBUTES *** @@ -73,199 +88,202 @@ No sections matched the following patterns: section .textrw in "P2" - Section Kind Address Alignment Size Object - ------- ---- ------- --------- ---- ------ -"A0": 0x1d8 - .intvec ro code 0x800'0000 4 0x1d8 startup_stm32g431xx.o [1] - - 0x800'01d8 0x1d8 + Section Kind Address Alignment Size Object + ------- ---- ------- --------- ---- ------ +"A0": 0x1d8 + .intvec ro code 0x800'0000 4 0x1d8 startup_stm32g431xx.o [1] + - 0x800'01d8 0x1d8 -"P1": 0x1'fe28 - .rodata const 0x800'01d8 4 0x8000 arm_common_tables.o [3] - .rodata const 0x800'81d8 4 0x4000 arm_common_tables.o [3] - .rodata const 0x800'c1d8 4 0x4000 arm_common_tables.o [3] - .rodata const 0x801'01d8 4 0x2000 arm_common_tables.o [3] - .rodata const 0x801'21d8 4 0x2000 arm_common_tables.o [3] - .rodata const 0x801'41d8 4 0x1f80 arm_common_tables.o [3] - .rodata const 0x801'6158 4 0x1dc0 arm_common_tables.o [3] - .rodata const 0x801'7f18 4 0x1000 arm_common_tables.o [3] - .rodata const 0x801'8f18 4 0x1000 arm_common_tables.o [3] - .rodata const 0x801'9f18 4 0xe10 arm_common_tables.o [3] - .rodata const 0x801'ad28 4 0x804 arm_common_tables.o [3] - .rodata const 0x801'b52c 4 0x800 arm_common_tables.o [3] - .rodata const 0x801'bd2c 4 0x800 arm_common_tables.o [3] - .text ro code 0x801'c52c 4 0x704 arm_cfft_f32.o [3] - .text ro code 0x801'cc30 4 0x592 arm_cfft_radix8_f32.o [3] - .text ro code 0x801'd1c2 2 0x2a copy_init3.o [5] - .text ro code 0x801'd1ec 4 0x46 arm_bitreversal2.o [3] - .rodata const 0x801'd234 4 0x400 arm_common_tables.o [3] - .rodata const 0x801'd634 4 0x400 arm_common_tables.o [3] - .rodata const 0x801'da34 4 0x380 arm_common_tables.o [3] - .rodata const 0x801'ddb4 4 0x370 arm_common_tables.o [3] - .text ro code 0x801'e124 4 0x360 imu.o [1] - .text ro code 0x801'e484 4 0x214 cos_sin_tan_32.o [4] - .text ro code 0x801'e698 4 0x1e U64Shr.o [5] - .text ro code 0x801'e6b8 4 0x248 main.o [1] - .text ro code 0x801'e900 4 0x128 motors.o [1] - .text ro code 0x801'ea28 4 0x1c0 dsp_manager.o [1] - .text ro code 0x801'ebe8 4 0xa0 system_stm32g4xx.o [1] - .text ro code 0x801'ec88 4 0x1bc arm_rfft_fast_init_f32.o [3] - .text ro code 0x801'ee44 4 0x90 arm_cos_f32.o [3] - .text ro code 0x801'eed4 4 0x10e arm_mult_f32.o [3] - .text ro code 0x801'efe4 4 0x182 arm_rfft_fast_f32.o [3] - .text ro code 0x801'f168 4 0x154 arm_cmplx_mag_f32.o [3] - .text ro code 0x801'f2bc 4 0x98 arm_cfft_init_f32.o [3] - .rodata const 0x801'f354 4 0x200 arm_common_tables.o [3] - .rodata const 0x801'f554 4 0x200 arm_common_tables.o [3] - .rodata const 0x801'f754 4 0x1a0 arm_common_tables.o [3] - .rodata const 0x801'f8f4 4 0x100 arm_common_tables.o [3] - .rodata const 0x801'f9f4 4 0x100 arm_common_tables.o [3] - .rodata const 0x801'faf4 4 0x80 arm_common_tables.o [3] - .rodata const 0x801'fb74 4 0x80 arm_common_tables.o [3] - .rodata const 0x801'fbf4 4 0x70 arm_common_tables.o [3] - .rodata const 0x801'fc64 4 0x60 arm_common_tables.o [3] - .text ro code 0x801'fcc4 2 0x38 zero_init3.o [5] - .rodata const 0x801'fcfc 4 0x28 arm_common_tables.o [3] - .text ro code 0x801'fd24 4 0x28 data_init.o [5] - .text ro code 0x801'fd4c 4 0x22 fpinit_M.o [4] - .text ro code 0x801'fd70 4 0x22 cmain.o [5] - .text ro code 0x801'fd92 2 0x4 low_level_init.o [2] - .text ro code 0x801'fd96 2 0x4 exit.o [2] - .text ro code 0x801'fd9c 4 0x4 cexit.o [5] - .text ro code 0x801'fda0 4 0xa cexit_2.o [5] - .text ro code 0x801'fdac 4 0x14 exit.o [6] - .iar.init_table const 0x801'fdc0 4 0x24 - Linker created - - .text ro code 0x801'fde4 4 0x1e cstartup_M.o [5] - .rodata const 0x801'fe04 4 0x10 system_stm32g4xx.o [1] - .rodata const 0x801'fe14 4 0x10 arm_const_structs.o [3] - .rodata const 0x801'fe24 4 0x10 arm_const_structs.o [3] - .rodata const 0x801'fe34 4 0x10 arm_const_structs.o [3] - .rodata const 0x801'fe44 4 0x10 arm_const_structs.o [3] - .rodata const 0x801'fe54 4 0x10 arm_const_structs.o [3] - .rodata const 0x801'fe64 4 0x10 arm_const_structs.o [3] - .rodata const 0x801'fe74 4 0x10 arm_const_structs.o [3] - .rodata const 0x801'fe84 4 0x10 arm_const_structs.o [3] - .rodata const 0x801'fe94 4 0x10 arm_const_structs.o [3] - .text ro code 0x801'fea4 4 0x10 startup_stm32g431xx.o [1] - .text ro code 0x801'feb4 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'feb8 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'febc 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'fec0 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'fec4 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'fec8 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'fecc 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'fed0 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'fed4 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'fed8 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'fedc 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'fee0 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'fee4 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'fee8 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'feec 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'fef0 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'fef4 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'fef8 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'fefc 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff00 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff04 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff08 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff0c 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff10 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff14 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff18 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff1c 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff20 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff24 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff28 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff2c 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff30 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff34 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff38 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff3c 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff40 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff44 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff48 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff4c 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff50 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff54 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff58 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff5c 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff60 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff64 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff68 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff6c 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff70 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff74 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff78 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff7c 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff80 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff84 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff88 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff8c 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff90 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff94 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff98 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ff9c 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ffa0 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ffa4 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ffa8 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ffac 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ffb0 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ffb4 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ffb8 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ffbc 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ffc0 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ffc4 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ffc8 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ffcc 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ffd0 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ffd4 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ffd8 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ffdc 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ffe0 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ffe4 2 0x4 startup_stm32g431xx.o [1] - .text ro code 0x801'ffe8 2 0x4 startup_stm32g431xx.o [1] - .rodata const 0x801'ffec 0x0 zero_init3.o [5] - .rodata const 0x801'ffec 0x0 copy_init3.o [5] - Initializer bytes const 0x801'ffec 4 0x14 - - 0x802'0000 0x1'fe28 +"P3", part 1 of 3: 0x14 + P3 s0 0x2000'0000 0x14 + .data inited 0x2000'0000 4 0x4 main.o [1] + .data inited 0x2000'0004 4 0x4 main.o [1] + .data inited 0x2000'0008 4 0x4 main.o [1] + .data inited 0x2000'000c 4 0x4 main.o [1] + .data inited 0x2000'0010 4 0x4 system_stm32g4xx.o [1] + - 0x2000'0014 0x14 -"P3", part 1 of 3: 0x14 - P3 s0 0x2000'0000 0x14 - .data inited 0x2000'0000 4 0x4 main.o [1] - .data inited 0x2000'0004 4 0x4 main.o [1] - .data inited 0x2000'0008 4 0x4 main.o [1] - .data inited 0x2000'000c 4 0x4 main.o [1] - .data inited 0x2000'0010 4 0x4 system_stm32g4xx.o [1] - - 0x2000'0014 0x14 +"P3", part 2 of 3: 0x1c7c + .bss zero 0x2000'0014 4 0x800 dsp_manager.o [1] + .bss zero 0x2000'0814 4 0x800 dsp_manager.o [1] + .bss zero 0x2000'1014 4 0x800 dsp_manager.o [1] + .bss zero 0x2000'1814 4 0x400 dsp_manager.o [1] + .bss zero 0x2000'1c14 4 0x1c imu.o [1] + .bss zero 0x2000'1c30 4 0x1c imu.o [1] + .bss zero 0x2000'1c4c 4 0x1c imu.o [1] + .bss zero 0x2000'1c68 4 0x18 dsp_manager.o [1] + .bss zero 0x2000'1c80 4 0x4 imu.o [1] + .bss zero 0x2000'1c84 4 0x4 imu.o [1] + .bss zero 0x2000'1c88 2 0x2 dsp_manager.o [1] + .bss zero 0x2000'1c8a 2 0x2 imu.o [1] + .bss zero 0x2000'1c8c 0x1 main.o [1] + - 0x2000'1c8d 0x1c79 -"P3", part 2 of 3: 0x1c7c - .bss zero 0x2000'0014 4 0x800 dsp_manager.o [1] - .bss zero 0x2000'0814 4 0x800 dsp_manager.o [1] - .bss zero 0x2000'1014 4 0x800 dsp_manager.o [1] - .bss zero 0x2000'1814 4 0x400 dsp_manager.o [1] - .bss zero 0x2000'1c14 4 0x1c imu.o [1] - .bss zero 0x2000'1c30 4 0x1c imu.o [1] - .bss zero 0x2000'1c4c 4 0x1c imu.o [1] - .bss zero 0x2000'1c68 4 0x18 dsp_manager.o [1] - .bss zero 0x2000'1c80 4 0x4 imu.o [1] - .bss zero 0x2000'1c84 4 0x4 imu.o [1] - .bss zero 0x2000'1c88 2 0x2 dsp_manager.o [1] - .bss zero 0x2000'1c8a 2 0x2 imu.o [1] - .bss zero 0x2000'1c8c 0x1 dsp_manager.o [1] - .bss zero 0x2000'1c8d 0x1 main.o [1] - - 0x2000'1c8e 0x1c7a +"P3", part 3 of 3: 0x800 + CSTACK 0x2000'1c90 8 0x800 + CSTACK uninit 0x2000'1c90 0x800 + - 0x2000'2490 0x800 -"P3", part 3 of 3: 0x800 - CSTACK 0x2000'1c90 8 0x800 - CSTACK uninit 0x2000'1c90 0x800 - - 0x2000'2490 0x800 +"P1", part 1 of 2 (*** FAILED ***): 0x1'fe34 + .rodata const 0x8000 arm_common_tables.o [3] + .rodata const 0x4000 arm_common_tables.o [3] + .rodata const 0x4000 arm_common_tables.o [3] + .rodata const 0x2000 arm_common_tables.o [3] + .rodata const 0x2000 arm_common_tables.o [3] + .rodata const 0x1f80 arm_common_tables.o [3] + .rodata const 0x1dc0 arm_common_tables.o [3] + .rodata const 0x1000 arm_common_tables.o [3] + .rodata const 0x1000 arm_common_tables.o [3] + .rodata const 0xe10 arm_common_tables.o [3] + .rodata const 0x804 arm_common_tables.o [3] + .rodata const 0x800 arm_common_tables.o [3] + .rodata const 0x800 arm_common_tables.o [3] + .text ro code 0x704 arm_cfft_f32.o [3] + .text ro code 0x592 arm_cfft_radix8_f32.o [3] + .text ro code 0x2a copy_init3.o [5] + .text ro code 0x46 arm_bitreversal2.o [3] + .rodata const 0x400 arm_common_tables.o [3] + .rodata const 0x400 arm_common_tables.o [3] + .rodata const 0x380 arm_common_tables.o [3] + .rodata const 0x370 arm_common_tables.o [3] + .text ro code 0x360 imu.o [1] + .text ro code 0x214 cos_sin_tan_32.o [4] + .text ro code 0x1e U64Shr.o [5] + .text ro code 0x248 main.o [1] + .text ro code 0x128 motors.o [1] + .text ro code 0x1e0 dsp_manager.o [1] + .text ro code 0xa0 system_stm32g4xx.o [1] + .text ro code 0x1bc arm_rfft_fast_init_f32.o [3] + .text ro code 0x90 arm_cos_f32.o [3] + .text ro code 0x10e arm_mult_f32.o [3] + .text ro code 0x182 arm_rfft_fast_f32.o [3] + .text ro code 0x154 arm_cmplx_mag_f32.o [3] + .text ro code 0x98 arm_cfft_init_f32.o [3] + .rodata const 0x200 arm_common_tables.o [3] + .rodata const 0x200 arm_common_tables.o [3] + .rodata const 0x1a0 arm_common_tables.o [3] + .rodata const 0x100 arm_common_tables.o [3] + .rodata const 0x100 arm_common_tables.o [3] + .rodata const 0x80 arm_common_tables.o [3] + .rodata const 0x80 arm_common_tables.o [3] + .rodata const 0x70 arm_common_tables.o [3] + .rodata const 0x60 arm_common_tables.o [3] + .text ro code 0x38 zero_init3.o [5] + .rodata const 0x28 arm_common_tables.o [3] + .text ro code 0x28 data_init.o [5] + .text ro code 0x22 fpinit_M.o [4] + .text ro code 0x22 cmain.o [5] + .text ro code 0x4 low_level_init.o [2] + .text ro code 0x4 exit.o [2] + .text ro code 0x4 cexit.o [5] + .text ro code 0xa cexit_2.o [5] + .text ro code 0x14 exit.o [6] + .iar.init_table const 0x18 - Linker created - + .text ro code 0x1e cstartup_M.o [5] + .rodata const 0x10 system_stm32g4xx.o [1] + .rodata const 0x10 arm_const_structs.o [3] + .rodata const 0x10 arm_const_structs.o [3] + .rodata const 0x10 arm_const_structs.o [3] + .rodata const 0x10 arm_const_structs.o [3] + .rodata const 0x10 arm_const_structs.o [3] + .rodata const 0x10 arm_const_structs.o [3] + .rodata const 0x10 arm_const_structs.o [3] + .rodata const 0x10 arm_const_structs.o [3] + .rodata const 0x10 arm_const_structs.o [3] + .text ro code 0x10 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .text ro code 0x4 startup_stm32g431xx.o [1] + .rodata const 0x0 zero_init3.o [5] + .rodata const 0x0 copy_init3.o [5] + 0x1'fe34 + +"P1", part 2 of 2 (*** FAILED ***): 0x14 + Initializer bytes const 0x14 (used: 0x0) + 0x14 Unused ranges: - From To Size - ---- -- ---- - 0x2000'2490 0x2000'3fff 0x1b70 - 0x2000'4000 0x2000'57ff 0x1800 + From To Size + ---- -- ---- + 0x800'01d8 0x801'ffff 0x1'fe28 + 0x2000'2490 0x2000'3fff 0x1b70 + 0x2000'4000 0x2000'57ff 0x1800 ******************************************************************************* @@ -275,12 +293,10 @@ Unused ranges: Address Size ------- ---- Zero (__iar_zero_init3) - 1 destination range, total size 0x1c7a: - 0x2000'0014 0x1c7a + 1 destination range, total size 0x1c79: + 0x2000'0014 0x1c79 Copy (__iar_copy_init3) - 1 source range, total size 0x14: - 0x801'ffec 0x14 1 destination range, total size 0x14: 0x2000'0000 0x14 @@ -297,14 +313,14 @@ command line/config: Total: C:\Users\vadychka\Documents\GitHub\leybl\fft\Debug\Obj: [1] - dsp_manager.o 448 7'195 + dsp_manager.o 480 7'194 imu.o 864 94 - main.o 584 16 17 + main.o 584 17 motors.o 296 startup_stm32g431xx.o 800 - system_stm32g4xx.o 160 20 4 + system_stm32g4xx.o 160 16 4 --------------------------------------------------- - Total: 3'152 36 7'310 + Total: 3'184 16 7'309 dl7M_tln.a: [2] exit.o 4 @@ -351,9 +367,9 @@ shb_l.a: [6] Total: 20 Gaps 12 4 - Linker created 36 2'048 + Linker created 44 2'048 ------------------------------------------------------- - Grand Total: 9'032 122'040 9'358 + Grand Total: 9'064 122'028 9'357 ******************************************************************************* @@ -362,258 +378,257 @@ shb_l.a: [6] Entry Address Size Type Object ----- ------- ---- ---- ------ -.iar.init_table$$Base 0x801'fdc0 -- Gb - Linker created - -.iar.init_table$$Limit 0x801'fde4 -- Gb - Linker created - -?main 0x801'fd71 Code Gb cmain.o [5] -ADC1_2_IRQHandler 0x801'ff1d Code Wk startup_stm32g431xx.o [1] -AHBPrescTable 0x801'fe04 0x10 Data Gb system_stm32g4xx.o [1] -BusFault_Handler 0x801'fec1 Code Wk startup_stm32g431xx.o [1] -By2Pi 0x801'e67c 0x1c Data Lc cos_sin_tan_32.o [4] -COMP1_2_3_IRQHandler 0x801'ffb9 Code Wk startup_stm32g431xx.o [1] -COMP4_IRQHandler 0x801'ffbd Code Wk startup_stm32g431xx.o [1] -CORDIC_IRQHandler 0x801'ffe5 Code Wk startup_stm32g431xx.o [1] -CRS_IRQHandler 0x801'ffc1 Code Wk startup_stm32g431xx.o [1] +.iar.init_table$$Base 0x1'fc08 -- Gb - Linker created - +.iar.init_table$$Limit 0x1'fc2c -- Gb - Linker created - +?main 0x1'fbb9 Code Gb cmain.o [5] +ADC1_2_IRQHandler 0x1'fd65 Code Wk startup_stm32g431xx.o [1] +AHBPrescTable 0x1'fc4c 0x10 Data Gb system_stm32g4xx.o [1] +BusFault_Handler 0x1'fd09 Code Wk startup_stm32g431xx.o [1] +By2Pi 0x1'e4a4 0x1c Data Lc cos_sin_tan_32.o [4] +COMP1_2_3_IRQHandler 0x1'fe01 Code Wk startup_stm32g431xx.o [1] +COMP4_IRQHandler 0x1'fe05 Code Wk startup_stm32g431xx.o [1] +CORDIC_IRQHandler 0x1'fe2d Code Wk startup_stm32g431xx.o [1] +CRS_IRQHandler 0x1'fe09 Code Wk startup_stm32g431xx.o [1] CSTACK$$Base 0x2000'1c90 -- Gb - Linker created - CSTACK$$Limit 0x2000'2490 -- Gb - Linker created - DMA1_Channel1_IRQHandler - 0x801'ff05 Code Wk startup_stm32g431xx.o [1] + 0x1'fd4d Code Wk startup_stm32g431xx.o [1] DMA1_Channel2_IRQHandler - 0x801'ff09 Code Wk startup_stm32g431xx.o [1] + 0x1'fd51 Code Wk startup_stm32g431xx.o [1] DMA1_Channel3_IRQHandler - 0x801'ff0d Code Wk startup_stm32g431xx.o [1] + 0x1'fd55 Code Wk startup_stm32g431xx.o [1] DMA1_Channel4_IRQHandler - 0x801'ff11 Code Wk startup_stm32g431xx.o [1] + 0x1'fd59 Code Wk startup_stm32g431xx.o [1] DMA1_Channel5_IRQHandler - 0x801'ff15 Code Wk startup_stm32g431xx.o [1] + 0x1'fd5d Code Wk startup_stm32g431xx.o [1] DMA1_Channel6_IRQHandler - 0x801'ff19 Code Wk startup_stm32g431xx.o [1] + 0x1'fd61 Code Wk startup_stm32g431xx.o [1] DMA2_Channel1_IRQHandler - 0x801'ffa1 Code Wk startup_stm32g431xx.o [1] + 0x1'fde9 Code Wk startup_stm32g431xx.o [1] DMA2_Channel2_IRQHandler - 0x801'ffa5 Code Wk startup_stm32g431xx.o [1] + 0x1'fded Code Wk startup_stm32g431xx.o [1] DMA2_Channel3_IRQHandler - 0x801'ffa9 Code Wk startup_stm32g431xx.o [1] + 0x1'fdf1 Code Wk startup_stm32g431xx.o [1] DMA2_Channel4_IRQHandler - 0x801'ffad Code Wk startup_stm32g431xx.o [1] + 0x1'fdf5 Code Wk startup_stm32g431xx.o [1] DMA2_Channel5_IRQHandler - 0x801'ffb1 Code Wk startup_stm32g431xx.o [1] + 0x1'fdf9 Code Wk startup_stm32g431xx.o [1] DMA2_Channel6_IRQHandler - 0x801'ffe1 Code Wk startup_stm32g431xx.o [1] -DMAMUX_OVR_IRQHandler 0x801'ffdd Code Wk startup_stm32g431xx.o [1] -DSP_AddSample 0x801'ea79 0x2e Code Gb dsp_manager.o [1] -DSP_Init 0x801'ea29 0x50 Code Gb dsp_manager.o [1] -DSP_Process 0x801'eaa9 0x108 Code Gb dsp_manager.o [1] -DebugMon_Handler 0x801'fecd Code Wk startup_stm32g431xx.o [1] -EXTI0_IRQHandler 0x801'fef1 Code Wk startup_stm32g431xx.o [1] -EXTI15_10_IRQHandler 0x801'ff75 Code Wk startup_stm32g431xx.o [1] -EXTI1_IRQHandler 0x801'fef5 Code Wk startup_stm32g431xx.o [1] -EXTI2_IRQHandler 0x801'fef9 Code Wk startup_stm32g431xx.o [1] -EXTI3_IRQHandler 0x801'fefd Code Wk startup_stm32g431xx.o [1] -EXTI4_IRQHandler 0x801'ff01 Code Wk startup_stm32g431xx.o [1] -EXTI9_5_IRQHandler 0x801'ff31 Code Wk startup_stm32g431xx.o [1] -FDCAN1_IT0_IRQHandler 0x801'ff29 Code Wk startup_stm32g431xx.o [1] -FDCAN1_IT1_IRQHandler 0x801'ff2d Code Wk startup_stm32g431xx.o [1] -FLASH_IRQHandler 0x801'fee9 Code Wk startup_stm32g431xx.o [1] -FMAC_IRQHandler 0x801'ffe9 Code Wk startup_stm32g431xx.o [1] -FPU_IRQHandler 0x801'ffc9 Code Wk startup_stm32g431xx.o [1] -HardFault_Handler 0x801'feb9 Code Wk startup_stm32g431xx.o [1] -I2C1_ER_IRQHandler 0x801'ff55 Code Wk startup_stm32g431xx.o [1] -I2C1_EV_IRQHandler 0x801'ff51 Code Wk startup_stm32g431xx.o [1] -I2C1_Init 0x801'e1f7 0x56 Code Gb imu.o [1] -I2C2_ER_IRQHandler 0x801'ff5d Code Wk startup_stm32g431xx.o [1] -I2C2_EV_IRQHandler 0x801'ff59 Code Wk startup_stm32g431xx.o [1] -I2C3_ER_IRQHandler 0x801'ffd9 Code Wk startup_stm32g431xx.o [1] -I2C3_EV_IRQHandler 0x801'ffd5 Code Wk startup_stm32g431xx.o [1] -I2C_ReadMulti 0x801'e24d 0x5c Code Gb imu.o [1] -IMU_Calibrate 0x801'e375 0x5c Code Gb imu.o [1] -IMU_Init 0x801'e2ed 0x88 Code Gb imu.o [1] -IMU_ReadRawData 0x801'e3d1 0x50 Code Gb imu.o [1] -IMU_SetBank 0x801'e2d9 0x12 Code Gb imu.o [1] -IMU_WriteReg 0x801'e2a9 0x30 Code Lc imu.o [1] -LPTIM1_IRQHandler 0x801'ff91 Code Wk startup_stm32g431xx.o [1] -LPUART1_IRQHandler 0x801'ffd1 Code Wk startup_stm32g431xx.o [1] -MemManage_Handler 0x801'febd Code Wk startup_stm32g431xx.o [1] -Motors_Init 0x801'e901 0xb2 Code Gb motors.o [1] -NMI_Handler 0x801'feb5 Code Wk startup_stm32g431xx.o [1] -PVD_PVM_IRQHandler 0x801'fedd Code Wk startup_stm32g431xx.o [1] -PendSV_Handler 0x801'fed1 Code Wk startup_stm32g431xx.o [1] -RCC_IRQHandler 0x801'feed Code Wk startup_stm32g431xx.o [1] -RNG_IRQHandler 0x801'ffcd Code Wk startup_stm32g431xx.o [1] -RTC_Alarm_IRQHandler 0x801'ff79 Code Wk startup_stm32g431xx.o [1] + 0x1'fe29 Code Wk startup_stm32g431xx.o [1] +DMAMUX_OVR_IRQHandler 0x1'fe25 Code Wk startup_stm32g431xx.o [1] +DSP_AddSample 0x1'e8a1 0x2e Code Gb dsp_manager.o [1] +DSP_Init 0x1'e851 0x50 Code Gb dsp_manager.o [1] +DSP_Process 0x1'e8d1 0x128 Code Gb dsp_manager.o [1] +DebugMon_Handler 0x1'fd15 Code Wk startup_stm32g431xx.o [1] +EXTI0_IRQHandler 0x1'fd39 Code Wk startup_stm32g431xx.o [1] +EXTI15_10_IRQHandler 0x1'fdbd Code Wk startup_stm32g431xx.o [1] +EXTI1_IRQHandler 0x1'fd3d Code Wk startup_stm32g431xx.o [1] +EXTI2_IRQHandler 0x1'fd41 Code Wk startup_stm32g431xx.o [1] +EXTI3_IRQHandler 0x1'fd45 Code Wk startup_stm32g431xx.o [1] +EXTI4_IRQHandler 0x1'fd49 Code Wk startup_stm32g431xx.o [1] +EXTI9_5_IRQHandler 0x1'fd79 Code Wk startup_stm32g431xx.o [1] +FDCAN1_IT0_IRQHandler 0x1'fd71 Code Wk startup_stm32g431xx.o [1] +FDCAN1_IT1_IRQHandler 0x1'fd75 Code Wk startup_stm32g431xx.o [1] +FLASH_IRQHandler 0x1'fd31 Code Wk startup_stm32g431xx.o [1] +FMAC_IRQHandler 0x1'fe31 Code Wk startup_stm32g431xx.o [1] +FPU_IRQHandler 0x1'fe11 Code Wk startup_stm32g431xx.o [1] +HardFault_Handler 0x1'fd01 Code Wk startup_stm32g431xx.o [1] +I2C1_ER_IRQHandler 0x1'fd9d Code Wk startup_stm32g431xx.o [1] +I2C1_EV_IRQHandler 0x1'fd99 Code Wk startup_stm32g431xx.o [1] +I2C1_Init 0x1'e01f 0x56 Code Gb imu.o [1] +I2C2_ER_IRQHandler 0x1'fda5 Code Wk startup_stm32g431xx.o [1] +I2C2_EV_IRQHandler 0x1'fda1 Code Wk startup_stm32g431xx.o [1] +I2C3_ER_IRQHandler 0x1'fe21 Code Wk startup_stm32g431xx.o [1] +I2C3_EV_IRQHandler 0x1'fe1d Code Wk startup_stm32g431xx.o [1] +I2C_ReadMulti 0x1'e075 0x5c Code Gb imu.o [1] +IMU_Calibrate 0x1'e19d 0x5c Code Gb imu.o [1] +IMU_Init 0x1'e115 0x88 Code Gb imu.o [1] +IMU_ReadRawData 0x1'e1f9 0x50 Code Gb imu.o [1] +IMU_SetBank 0x1'e101 0x12 Code Gb imu.o [1] +IMU_WriteReg 0x1'e0d1 0x30 Code Lc imu.o [1] +LPTIM1_IRQHandler 0x1'fdd9 Code Wk startup_stm32g431xx.o [1] +LPUART1_IRQHandler 0x1'fe19 Code Wk startup_stm32g431xx.o [1] +MemManage_Handler 0x1'fd05 Code Wk startup_stm32g431xx.o [1] +Motors_Init 0x1'e729 0xb2 Code Gb motors.o [1] +NMI_Handler 0x1'fcfd Code Wk startup_stm32g431xx.o [1] +PVD_PVM_IRQHandler 0x1'fd25 Code Wk startup_stm32g431xx.o [1] +PendSV_Handler 0x1'fd19 Code Wk startup_stm32g431xx.o [1] +RCC_IRQHandler 0x1'fd35 Code Wk startup_stm32g431xx.o [1] +RNG_IRQHandler 0x1'fe15 Code Wk startup_stm32g431xx.o [1] +RTC_Alarm_IRQHandler 0x1'fdc1 Code Wk startup_stm32g431xx.o [1] RTC_TAMP_LSECSS_IRQHandler - 0x801'fee1 Code Wk startup_stm32g431xx.o [1] -RTC_WKUP_IRQHandler 0x801'fee5 Code Wk startup_stm32g431xx.o [1] -Region$$Table$$Base 0x801'fdc0 -- Gb - Linker created - -Region$$Table$$Limit 0x801'fde4 -- Gb - Linker created - -Reset_Handler 0x801'fea5 Code Wk startup_stm32g431xx.o [1] -SAI1_IRQHandler 0x801'ffc5 Code Wk startup_stm32g431xx.o [1] -SPI1_IRQHandler 0x801'ff61 Code Wk startup_stm32g431xx.o [1] -SPI2_IRQHandler 0x801'ff65 Code Wk startup_stm32g431xx.o [1] -SPI3_IRQHandler 0x801'ff95 Code Wk startup_stm32g431xx.o [1] -SVC_Handler 0x801'fec9 Code Wk startup_stm32g431xx.o [1] -Set_Motor_Individual 0x801'e9c5 0x16 Code Gb motors.o [1] -Set_Motors 0x801'e9b3 0x12 Code Gb motors.o [1] -SysTick_Handler 0x801'fed5 Code Wk startup_stm32g431xx.o [1] + 0x1'fd29 Code Wk startup_stm32g431xx.o [1] +RTC_WKUP_IRQHandler 0x1'fd2d Code Wk startup_stm32g431xx.o [1] +Region$$Table$$Base 0x1'fc08 -- Gb - Linker created - +Region$$Table$$Limit 0x1'fc2c -- Gb - Linker created - +Reset_Handler 0x1'fced Code Wk startup_stm32g431xx.o [1] +SAI1_IRQHandler 0x1'fe0d Code Wk startup_stm32g431xx.o [1] +SPI1_IRQHandler 0x1'fda9 Code Wk startup_stm32g431xx.o [1] +SPI2_IRQHandler 0x1'fdad Code Wk startup_stm32g431xx.o [1] +SPI3_IRQHandler 0x1'fddd Code Wk startup_stm32g431xx.o [1] +SVC_Handler 0x1'fd11 Code Wk startup_stm32g431xx.o [1] +Set_Motor_Individual 0x1'e7ed 0x16 Code Gb motors.o [1] +Set_Motors 0x1'e7db 0x12 Code Gb motors.o [1] +SysTick_Handler 0x1'fd1d Code Wk startup_stm32g431xx.o [1] SystemClock_Config_160MHz - 0x801'e77f 0x54 Code Gb main.o [1] + 0x1'e5a7 0x54 Code Gb main.o [1] SystemCoreClock 0x2000'0010 0x4 Data Gb system_stm32g4xx.o [1] -SystemCoreClockUpdate 0x801'ebf5 0x78 Code Gb system_stm32g4xx.o [1] -SystemInit 0x801'ebe9 0xc Code Gb system_stm32g4xx.o [1] +SystemCoreClockUpdate 0x1'ea3d 0x78 Code Gb system_stm32g4xx.o [1] +SystemInit 0x1'ea31 0xc Code Gb system_stm32g4xx.o [1] TIM1_BRK_TIM15_IRQHandler - 0x801'ff35 Code Wk startup_stm32g431xx.o [1] -TIM1_CC_IRQHandler 0x801'ff41 Code Wk startup_stm32g431xx.o [1] + 0x1'fd7d Code Wk startup_stm32g431xx.o [1] +TIM1_CC_IRQHandler 0x1'fd89 Code Wk startup_stm32g431xx.o [1] TIM1_TRG_COM_TIM17_IRQHandler - 0x801'ff3d Code Wk startup_stm32g431xx.o [1] + 0x1'fd85 Code Wk startup_stm32g431xx.o [1] TIM1_UP_TIM16_IRQHandler - 0x801'ff39 Code Wk startup_stm32g431xx.o [1] -TIM2_IRQHandler 0x801'ff45 Code Wk startup_stm32g431xx.o [1] -TIM3_IRQHandler 0x801'ff49 Code Wk startup_stm32g431xx.o [1] -TIM4_IRQHandler 0x801'ff4d Code Wk startup_stm32g431xx.o [1] -TIM6_DAC_IRQHandler 0x801'e87b 0x14 Code Gb main.o [1] -TIM6_Init_1000Hz 0x801'e845 0x36 Code Gb main.o [1] -TIM7_IRQHandler 0x801'ff9d Code Wk startup_stm32g431xx.o [1] -TIM8_BRK_IRQHandler 0x801'ff81 Code Wk startup_stm32g431xx.o [1] -TIM8_CC_IRQHandler 0x801'ff8d Code Wk startup_stm32g431xx.o [1] + 0x1'fd81 Code Wk startup_stm32g431xx.o [1] +TIM2_IRQHandler 0x1'fd8d Code Wk startup_stm32g431xx.o [1] +TIM3_IRQHandler 0x1'fd91 Code Wk startup_stm32g431xx.o [1] +TIM4_IRQHandler 0x1'fd95 Code Wk startup_stm32g431xx.o [1] +TIM6_DAC_IRQHandler 0x1'e6a3 0x14 Code Gb main.o [1] +TIM6_Init_1000Hz 0x1'e66d 0x36 Code Gb main.o [1] +TIM7_IRQHandler 0x1'fde5 Code Wk startup_stm32g431xx.o [1] +TIM8_BRK_IRQHandler 0x1'fdc9 Code Wk startup_stm32g431xx.o [1] +TIM8_CC_IRQHandler 0x1'fdd5 Code Wk startup_stm32g431xx.o [1] TIM8_TRG_COM_IRQHandler - 0x801'ff89 Code Wk startup_stm32g431xx.o [1] -TIM8_UP_IRQHandler 0x801'ff85 Code Wk startup_stm32g431xx.o [1] -UART2_Init_921600 0x801'e7d3 0x50 Code Gb main.o [1] -UART4_IRQHandler 0x801'ff99 Code Wk startup_stm32g431xx.o [1] -UART_SendPacket 0x801'e823 0x22 Code Gb main.o [1] -UCPD1_IRQHandler 0x801'ffb5 Code Wk startup_stm32g431xx.o [1] -USART1_IRQHandler 0x801'ff69 Code Wk startup_stm32g431xx.o [1] -USART2_IRQHandler 0x801'ff6d Code Wk startup_stm32g431xx.o [1] -USART3_IRQHandler 0x801'ff71 Code Wk startup_stm32g431xx.o [1] -USBWakeUp_IRQHandler 0x801'ff7d Code Wk startup_stm32g431xx.o [1] -USB_HP_IRQHandler 0x801'ff21 Code Wk startup_stm32g431xx.o [1] -USB_LP_IRQHandler 0x801'ff25 Code Wk startup_stm32g431xx.o [1] -UsageFault_Handler 0x801'fec5 Code Wk startup_stm32g431xx.o [1] -WWDG_IRQHandler 0x801'fed9 Code Wk startup_stm32g431xx.o [1] -__NVIC_EnableIRQ 0x801'e6b9 0x1c Code Lc main.o [1] -__aeabi_llsr 0x801'e699 Code Gb U64Shr.o [5] -__cmain 0x801'fd71 Code Gb cmain.o [5] -__exit 0x801'fdad 0x14 Code Gb exit.o [6] -__iar_Sin_accurate32 0x801'e485 0x1c8 Code Lc cos_sin_tan_32.o [4] -__iar_copy_init3 0x801'd1c3 0x2a Code Gb copy_init3.o [5] -__iar_cos_accurate32 0x801'e675 0x4 Code Gb cos_sin_tan_32.o [4] -__iar_cos_accuratef 0x801'e675 0x4 Code Gb cos_sin_tan_32.o [4] -__iar_cos_medium32 0x801'e675 0x4 Code Gb cos_sin_tan_32.o [4] -__iar_cos_mediumf 0x801'e675 0x4 Code Gb cos_sin_tan_32.o [4] -__iar_cos_small32 0x801'e675 0x4 Code Gb cos_sin_tan_32.o [4] -__iar_cos_smallf 0x801'e675 0x4 Code Gb cos_sin_tan_32.o [4] -__iar_cosf 0x801'e675 0x4 Code Gb cos_sin_tan_32.o [4] -__iar_data_init3 0x801'fd25 0x28 Code Gb data_init.o [5] -__iar_init_vfp 0x801'fd4d Code Gb fpinit_M.o [4] -__iar_program_start 0x801'fde5 Code Gb cstartup_M.o [5] -__iar_sin_accurate32 0x801'e679 0x4 Code Gb cos_sin_tan_32.o [4] -__iar_sin_accuratef 0x801'e679 0x4 Code Gb cos_sin_tan_32.o [4] -__iar_sin_medium32 0x801'e679 0x4 Code Gb cos_sin_tan_32.o [4] -__iar_sin_mediumf 0x801'e679 0x4 Code Gb cos_sin_tan_32.o [4] -__iar_sin_small32 0x801'e679 0x4 Code Gb cos_sin_tan_32.o [4] -__iar_sin_smallf 0x801'e679 0x4 Code Gb cos_sin_tan_32.o [4] -__iar_sinf 0x801'e679 0x4 Code Gb cos_sin_tan_32.o [4] -__iar_zero_init3 0x801'fcc5 0x38 Code Gb zero_init3.o [5] -__low_level_init 0x801'fd93 0x4 Code Gb low_level_init.o [2] + 0x1'fdd1 Code Wk startup_stm32g431xx.o [1] +TIM8_UP_IRQHandler 0x1'fdcd Code Wk startup_stm32g431xx.o [1] +UART2_Init_921600 0x1'e5fb 0x50 Code Gb main.o [1] +UART4_IRQHandler 0x1'fde1 Code Wk startup_stm32g431xx.o [1] +UART_SendPacket 0x1'e64b 0x22 Code Gb main.o [1] +UCPD1_IRQHandler 0x1'fdfd Code Wk startup_stm32g431xx.o [1] +USART1_IRQHandler 0x1'fdb1 Code Wk startup_stm32g431xx.o [1] +USART2_IRQHandler 0x1'fdb5 Code Wk startup_stm32g431xx.o [1] +USART3_IRQHandler 0x1'fdb9 Code Wk startup_stm32g431xx.o [1] +USBWakeUp_IRQHandler 0x1'fdc5 Code Wk startup_stm32g431xx.o [1] +USB_HP_IRQHandler 0x1'fd69 Code Wk startup_stm32g431xx.o [1] +USB_LP_IRQHandler 0x1'fd6d Code Wk startup_stm32g431xx.o [1] +UsageFault_Handler 0x1'fd0d Code Wk startup_stm32g431xx.o [1] +WWDG_IRQHandler 0x1'fd21 Code Wk startup_stm32g431xx.o [1] +__NVIC_EnableIRQ 0x1'e4e1 0x1c Code Lc main.o [1] +__aeabi_llsr 0x1'e4c1 Code Gb U64Shr.o [5] +__cmain 0x1'fbb9 Code Gb cmain.o [5] +__exit 0x1'fbf5 0x14 Code Gb exit.o [6] +__iar_Sin_accurate32 0x1'e2ad 0x1c8 Code Lc cos_sin_tan_32.o [4] +__iar_copy_init3 0x1'cfeb 0x2a Code Gb copy_init3.o [5] +__iar_cos_accurate32 0x1'e49d 0x4 Code Gb cos_sin_tan_32.o [4] +__iar_cos_accuratef 0x1'e49d 0x4 Code Gb cos_sin_tan_32.o [4] +__iar_cos_medium32 0x1'e49d 0x4 Code Gb cos_sin_tan_32.o [4] +__iar_cos_mediumf 0x1'e49d 0x4 Code Gb cos_sin_tan_32.o [4] +__iar_cos_small32 0x1'e49d 0x4 Code Gb cos_sin_tan_32.o [4] +__iar_cos_smallf 0x1'e49d 0x4 Code Gb cos_sin_tan_32.o [4] +__iar_cosf 0x1'e49d 0x4 Code Gb cos_sin_tan_32.o [4] +__iar_data_init3 0x1'fb6d 0x28 Code Gb data_init.o [5] +__iar_init_vfp 0x1'fb95 Code Gb fpinit_M.o [4] +__iar_program_start 0x1'fc2d Code Gb cstartup_M.o [5] +__iar_sin_accurate32 0x1'e4a1 0x4 Code Gb cos_sin_tan_32.o [4] +__iar_sin_accuratef 0x1'e4a1 0x4 Code Gb cos_sin_tan_32.o [4] +__iar_sin_medium32 0x1'e4a1 0x4 Code Gb cos_sin_tan_32.o [4] +__iar_sin_mediumf 0x1'e4a1 0x4 Code Gb cos_sin_tan_32.o [4] +__iar_sin_small32 0x1'e4a1 0x4 Code Gb cos_sin_tan_32.o [4] +__iar_sin_smallf 0x1'e4a1 0x4 Code Gb cos_sin_tan_32.o [4] +__iar_sinf 0x1'e4a1 0x4 Code Gb cos_sin_tan_32.o [4] +__iar_zero_init3 0x1'fb0d 0x38 Code Gb zero_init3.o [5] +__low_level_init 0x1'fbdb 0x4 Code Gb low_level_init.o [2] __vector_table 0x800'0000 Data Gb startup_stm32g431xx.o [1] -_call_main 0x801'fd7d Code Gb cmain.o [5] -_exit 0x801'fd9d Code Gb cexit.o [5] -_exit_2 0x801'fda1 Code Gb cexit_2.o [5] +_call_main 0x1'fbc5 Code Gb cmain.o [5] +_exit 0x1'fbe5 Code Gb cexit.o [5] +_exit_2 0x1'fbe9 Code Gb cexit_2.o [5] armBitRevIndexTable1024 - 0x801'9f18 0xe10 Data Gb arm_common_tables.o [3] -armBitRevIndexTable128 0x801'f754 0x1a0 Data Gb arm_common_tables.o [3] -armBitRevIndexTable16 0x801'fcfc 0x28 Data Gb arm_common_tables.o [3] + 0x1'9d40 0xe10 Data Gb arm_common_tables.o [3] +armBitRevIndexTable128 0x1'f59c 0x1a0 Data Gb arm_common_tables.o [3] +armBitRevIndexTable16 0x1'fb44 0x28 Data Gb arm_common_tables.o [3] armBitRevIndexTable2048 - 0x801'6158 0x1dc0 Data Gb arm_common_tables.o [3] -armBitRevIndexTable256 0x801'ddb4 0x370 Data Gb arm_common_tables.o [3] -armBitRevIndexTable32 0x801'fc64 0x60 Data Gb arm_common_tables.o [3] + 0x1'5f80 0x1dc0 Data Gb arm_common_tables.o [3] +armBitRevIndexTable256 0x1'dbdc 0x370 Data Gb arm_common_tables.o [3] +armBitRevIndexTable32 0x1'faac 0x60 Data Gb arm_common_tables.o [3] armBitRevIndexTable4096 - 0x801'41d8 0x1f80 Data Gb arm_common_tables.o [3] -armBitRevIndexTable512 0x801'da34 0x380 Data Gb arm_common_tables.o [3] -armBitRevIndexTable64 0x801'fbf4 0x70 Data Gb arm_common_tables.o [3] -arm_bitreversal_32 0x801'd1ed 0x46 Code Gb arm_bitreversal2.o [3] -arm_cfft_f32 0x801'caad 0x184 Code Gb arm_cfft_f32.o [3] -arm_cfft_init_f32 0x801'f2bd 0x98 Code Gb arm_cfft_init_f32.o [3] -arm_cfft_radix8by2_f32 0x801'c52d 0x16a Code Gb arm_cfft_f32.o [3] -arm_cfft_radix8by4_f32 0x801'c699 0x412 Code Gb arm_cfft_f32.o [3] + 0x1'4000 0x1f80 Data Gb arm_common_tables.o [3] +armBitRevIndexTable512 0x1'd85c 0x380 Data Gb arm_common_tables.o [3] +armBitRevIndexTable64 0x1'fa3c 0x70 Data Gb arm_common_tables.o [3] +arm_bitreversal_32 0x1'd015 0x46 Code Gb arm_bitreversal2.o [3] +arm_cfft_f32 0x1'c8d5 0x184 Code Gb arm_cfft_f32.o [3] +arm_cfft_init_f32 0x1'f105 0x98 Code Gb arm_cfft_init_f32.o [3] +arm_cfft_radix8by2_f32 0x1'c355 0x16a Code Gb arm_cfft_f32.o [3] +arm_cfft_radix8by4_f32 0x1'c4c1 0x412 Code Gb arm_cfft_f32.o [3] arm_cfft_sR_f32_len1024 - 0x801'fe74 0x10 Data Gb arm_const_structs.o [3] -arm_cfft_sR_f32_len128 0x801'fe44 0x10 Data Gb arm_const_structs.o [3] -arm_cfft_sR_f32_len16 0x801'fe14 0x10 Data Gb arm_const_structs.o [3] + 0x1'fcbc 0x10 Data Gb arm_const_structs.o [3] +arm_cfft_sR_f32_len128 0x1'fc8c 0x10 Data Gb arm_const_structs.o [3] +arm_cfft_sR_f32_len16 0x1'fc5c 0x10 Data Gb arm_const_structs.o [3] arm_cfft_sR_f32_len2048 - 0x801'fe84 0x10 Data Gb arm_const_structs.o [3] -arm_cfft_sR_f32_len256 0x801'fe54 0x10 Data Gb arm_const_structs.o [3] -arm_cfft_sR_f32_len32 0x801'fe24 0x10 Data Gb arm_const_structs.o [3] + 0x1'fccc 0x10 Data Gb arm_const_structs.o [3] +arm_cfft_sR_f32_len256 0x1'fc9c 0x10 Data Gb arm_const_structs.o [3] +arm_cfft_sR_f32_len32 0x1'fc6c 0x10 Data Gb arm_const_structs.o [3] arm_cfft_sR_f32_len4096 - 0x801'fe94 0x10 Data Gb arm_const_structs.o [3] -arm_cfft_sR_f32_len512 0x801'fe64 0x10 Data Gb arm_const_structs.o [3] -arm_cfft_sR_f32_len64 0x801'fe34 0x10 Data Gb arm_const_structs.o [3] -arm_cmplx_mag_f32 0x801'f169 0x154 Code Gb arm_cmplx_mag_f32.o [3] -arm_cos_f32 0x801'ee45 0x90 Code Gb arm_cos_f32.o [3] -arm_mult_f32 0x801'eed5 0x10e Code Gb arm_mult_f32.o [3] + 0x1'fcdc 0x10 Data Gb arm_const_structs.o [3] +arm_cfft_sR_f32_len512 0x1'fcac 0x10 Data Gb arm_const_structs.o [3] +arm_cfft_sR_f32_len64 0x1'fc7c 0x10 Data Gb arm_const_structs.o [3] +arm_cmplx_mag_f32 0x1'efb1 0x154 Code Gb arm_cmplx_mag_f32.o [3] +arm_cos_f32 0x1'ec8d 0x90 Code Gb arm_cos_f32.o [3] +arm_mult_f32 0x1'ed1d 0x10e Code Gb arm_mult_f32.o [3] arm_radix8_butterfly_f32 - 0x801'cc31 0x592 Code Gb arm_cfft_radix8_f32.o [3] + 0x1'ca59 0x592 Code Gb arm_cfft_radix8_f32.o [3] arm_rfft_1024_fast_init_f32 - 0x801'ed39 0x26 Code Lc arm_rfft_fast_init_f32.o [3] + 0x1'eb81 0x26 Code Lc arm_rfft_fast_init_f32.o [3] arm_rfft_128_fast_init_f32 - 0x801'eccd 0x22 Code Lc arm_rfft_fast_init_f32.o [3] + 0x1'eb15 0x22 Code Lc arm_rfft_fast_init_f32.o [3] arm_rfft_2048_fast_init_f32 - 0x801'ed5f 0x26 Code Lc arm_rfft_fast_init_f32.o [3] + 0x1'eba7 0x26 Code Lc arm_rfft_fast_init_f32.o [3] arm_rfft_256_fast_init_f32 - 0x801'ecef 0x24 Code Lc arm_rfft_fast_init_f32.o [3] + 0x1'eb37 0x24 Code Lc arm_rfft_fast_init_f32.o [3] arm_rfft_32_fast_init_f32 - 0x801'ec89 0x22 Code Lc arm_rfft_fast_init_f32.o [3] + 0x1'ead1 0x22 Code Lc arm_rfft_fast_init_f32.o [3] arm_rfft_4096_fast_init_f32 - 0x801'ed85 0x26 Code Lc arm_rfft_fast_init_f32.o [3] + 0x1'ebcd 0x26 Code Lc arm_rfft_fast_init_f32.o [3] arm_rfft_512_fast_init_f32 - 0x801'ed13 0x26 Code Lc arm_rfft_fast_init_f32.o [3] + 0x1'eb5b 0x26 Code Lc arm_rfft_fast_init_f32.o [3] arm_rfft_64_fast_init_f32 - 0x801'ecab 0x22 Code Lc arm_rfft_fast_init_f32.o [3] -arm_rfft_fast_f32 0x801'f12d 0x3a Code Gb arm_rfft_fast_f32.o [3] -arm_rfft_fast_init_f32 0x801'edab 0x5a Code Gb arm_rfft_fast_init_f32.o [3] -biquad_apply 0x801'e125 0x42 Code Gb imu.o [1] -biquad_init_notch 0x801'e169 0x8e Code Gb imu.o [1] -cosf 0x801'e675 0x4 Code Gb cos_sin_tan_32.o [4] -dsp_buffer_ready 0x2000'1c8c 0x1 Data Gb dsp_manager.o [1] -exit 0x801'fd97 0x4 Code Gb exit.o [2] + 0x1'eaf3 0x22 Code Lc arm_rfft_fast_init_f32.o [3] +arm_rfft_fast_f32 0x1'ef75 0x3a Code Gb arm_rfft_fast_f32.o [3] +arm_rfft_fast_init_f32 0x1'ebf3 0x5a Code Gb arm_rfft_fast_init_f32.o [3] +biquad_apply 0x1'df4d 0x42 Code Gb imu.o [1] +biquad_init_notch 0x1'df91 0x8e Code Gb imu.o [1] +cosf 0x1'e49d 0x4 Code Gb cos_sin_tan_32.o [4] +exit 0x1'fbdf 0x4 Code Gb exit.o [2] fft_handler 0x2000'1c68 0x18 Data Lc dsp_manager.o [1] fft_input 0x2000'0014 0x800 Data Lc dsp_manager.o [1] fft_output 0x2000'0814 0x800 Data Lc dsp_manager.o [1] filt_gx 0x2000'1c80 0x4 Data Gb imu.o [1] gyro_bias_x 0x2000'1c84 0x4 Data Gb imu.o [1] hann_window 0x2000'1014 0x800 Data Lc dsp_manager.o [1] -imu_flag 0x2000'1c8d 0x1 Data Gb main.o [1] +imu_flag 0x2000'1c8c 0x1 Data Gb main.o [1] m1_speed 0x2000'0000 0x4 Data Gb main.o [1] m2_speed 0x2000'0004 0x4 Data Gb main.o [1] m3_speed 0x2000'0008 0x4 Data Gb main.o [1] m4_speed 0x2000'000c 0x4 Data Gb main.o [1] magnitudes 0x2000'1814 0x400 Data Lc dsp_manager.o [1] -main 0x801'e6d5 0xaa Code Gb main.o [1] -merge_rfft_f32 0x801'f08d 0xa0 Code Gb arm_rfft_fast_f32.o [3] +main 0x1'e4fd 0xaa Code Gb main.o [1] +merge_rfft_f32 0x1'eed5 0xa0 Code Gb arm_rfft_fast_f32.o [3] notch1 0x2000'1c14 0x1c Data Gb imu.o [1] notch2 0x2000'1c30 0x1c Data Gb imu.o [1] notch3 0x2000'1c4c 0x1c Data Gb imu.o [1] raw_gx 0x2000'1c8a 0x2 Data Gb imu.o [1] sample_count 0x2000'1c88 0x2 Data Lc dsp_manager.o [1] -sinTable_f32 0x801'ad28 0x804 Data Gb arm_common_tables.o [3] -sinf 0x801'e679 0x4 Code Gb cos_sin_tan_32.o [4] -stage_rfft_f32 0x801'efe5 0xa8 Code Gb arm_rfft_fast_f32.o [3] -twiddleCoef_1024 0x801'01d8 0x2000 Data Gb arm_common_tables.o [3] -twiddleCoef_128 0x801'd234 0x400 Data Gb arm_common_tables.o [3] -twiddleCoef_16 0x801'faf4 0x80 Data Gb arm_common_tables.o [3] -twiddleCoef_2048 0x800'81d8 0x4000 Data Gb arm_common_tables.o [3] -twiddleCoef_256 0x801'b52c 0x800 Data Gb arm_common_tables.o [3] -twiddleCoef_32 0x801'f8f4 0x100 Data Gb arm_common_tables.o [3] -twiddleCoef_4096 0x800'01d8 0x8000 Data Gb arm_common_tables.o [3] -twiddleCoef_512 0x801'7f18 0x1000 Data Gb arm_common_tables.o [3] -twiddleCoef_64 0x801'f354 0x200 Data Gb arm_common_tables.o [3] -twiddleCoef_rfft_1024 0x801'8f18 0x1000 Data Gb arm_common_tables.o [3] -twiddleCoef_rfft_128 0x801'f554 0x200 Data Gb arm_common_tables.o [3] -twiddleCoef_rfft_2048 0x801'21d8 0x2000 Data Gb arm_common_tables.o [3] -twiddleCoef_rfft_256 0x801'd634 0x400 Data Gb arm_common_tables.o [3] -twiddleCoef_rfft_32 0x801'fb74 0x80 Data Gb arm_common_tables.o [3] -twiddleCoef_rfft_4096 0x800'c1d8 0x4000 Data Gb arm_common_tables.o [3] -twiddleCoef_rfft_512 0x801'bd2c 0x800 Data Gb arm_common_tables.o [3] -twiddleCoef_rfft_64 0x801'f9f4 0x100 Data Gb arm_common_tables.o [3] +sinTable_f32 0x1'ab50 0x804 Data Gb arm_common_tables.o [3] +sinf 0x1'e4a1 0x4 Code Gb cos_sin_tan_32.o [4] +stage_rfft_f32 0x1'ee2d 0xa8 Code Gb arm_rfft_fast_f32.o [3] +twiddleCoef_1024 0x1'0000 0x2000 Data Gb arm_common_tables.o [3] +twiddleCoef_128 0x1'd05c 0x400 Data Gb arm_common_tables.o [3] +twiddleCoef_16 0x1'f93c 0x80 Data Gb arm_common_tables.o [3] +twiddleCoef_2048 0x8000 0x4000 Data Gb arm_common_tables.o [3] +twiddleCoef_256 0x1'b354 0x800 Data Gb arm_common_tables.o [3] +twiddleCoef_32 0x1'f73c 0x100 Data Gb arm_common_tables.o [3] +twiddleCoef_4096 0x0 0x8000 Data Gb arm_common_tables.o [3] +twiddleCoef_512 0x1'7d40 0x1000 Data Gb arm_common_tables.o [3] +twiddleCoef_64 0x1'f19c 0x200 Data Gb arm_common_tables.o [3] +twiddleCoef_rfft_1024 0x1'8d40 0x1000 Data Gb arm_common_tables.o [3] +twiddleCoef_rfft_128 0x1'f39c 0x200 Data Gb arm_common_tables.o [3] +twiddleCoef_rfft_2048 0x1'2000 0x2000 Data Gb arm_common_tables.o [3] +twiddleCoef_rfft_256 0x1'd45c 0x400 Data Gb arm_common_tables.o [3] +twiddleCoef_rfft_32 0x1'f9bc 0x80 Data Gb arm_common_tables.o [3] +twiddleCoef_rfft_4096 0xc000 0x4000 Data Gb arm_common_tables.o [3] +twiddleCoef_rfft_512 0x1'bb54 0x800 Data Gb arm_common_tables.o [3] +twiddleCoef_rfft_64 0x1'f83c 0x100 Data Gb arm_common_tables.o [3] [1] = C:\Users\vadychka\Documents\GitHub\leybl\fft\Debug\Obj @@ -623,9 +638,9 @@ twiddleCoef_rfft_64 0x801'f9f4 0x100 Data Gb arm_common_tables.o [3] [5] = rt7M_tl.a [6] = shb_l.a - 9'032 bytes of readonly code memory - 122'040 bytes of readonly data memory - 9'358 bytes of readwrite data memory + 9'064 bytes of readonly code memory + 122'028 bytes of readonly data memory + 9'357 bytes of readwrite data memory -Errors: none +Errors: 3 Warnings: none diff --git a/Debug/Obj/dsp_manager.o b/Debug/Obj/dsp_manager.o index bf114a0..a4626bc 100644 Binary files a/Debug/Obj/dsp_manager.o and b/Debug/Obj/dsp_manager.o differ diff --git a/Debug/Obj/imu.o b/Debug/Obj/imu.o index 5c7e7a5..f30c7ec 100644 Binary files a/Debug/Obj/imu.o and b/Debug/Obj/imu.o differ diff --git a/Debug/Obj/main.o b/Debug/Obj/main.o index b3cb777..2d44936 100644 Binary files a/Debug/Obj/main.o and b/Debug/Obj/main.o differ diff --git a/Debug/Obj/startup_stm32g431xx.o b/Debug/Obj/startup_stm32g431xx.o index dc8f34c..515aa43 100644 Binary files a/Debug/Obj/startup_stm32g431xx.o and b/Debug/Obj/startup_stm32g431xx.o differ diff --git a/Debug/Obj/system_stm32g4xx.o b/Debug/Obj/system_stm32g4xx.o index b95e87d..9e8df97 100644 Binary files a/Debug/Obj/system_stm32g4xx.o and b/Debug/Obj/system_stm32g4xx.o differ diff --git a/drone_par_on_gx_up.py b/drone_par_on_gx_up.py new file mode 100644 index 0000000..238466f --- /dev/null +++ b/drone_par_on_gx_up.py @@ -0,0 +1,133 @@ +import serial +import struct +import numpy as np +import matplotlib.pyplot as plt +from matplotlib.animation import FuncAnimation +from matplotlib.ticker import MultipleLocator + +# --- НАСТРОЙКИ --- +PORT = 'COM3' +BAUD = 921600 +FS = 1000 +SAMPLES = 512 +PACKET_SIZE = 12 # Изменено: 2(AA BB) + 2(gx) + 2(fgx) + 2(f1) + 2(f2) + 2(f3) + +try: + ser = serial.Serial(PORT, BAUD, timeout=0.01) + ser.set_buffer_size(rx_size=12800, tx_size=12800) + ser.reset_input_buffer() + print(f"Подключено к {PORT}. Ожидание данных (12-байтные пакеты)...") +except Exception as e: + print(f"Ошибка порта: {e}") + exit() + +# Буферы данных +raw_buffer = np.zeros(SAMPLES) +filt_buffer = np.zeros(SAMPLES) +peak_freqs = [0, 0, 0] # Для хранения частот из STM32 +data_packet = bytearray() + +fig, (ax1, ax2) = plt.subplots(2, 1, figsize=(10, 8)) + +# 1. Временной график +line_raw, = ax1.plot(raw_buffer, color='red', lw=2.5, alpha=0.3, label='Грязный (Raw)') +line_filt, = ax1.plot(filt_buffer, color='blue', lw=1.2, label='Фильтр') # Обновлено название +ax1.set_title("Осциллограф: Гироскоп X") +ax1.set_ylim(-2000, 2000) +ax1.legend(loc='upper right') +ax1.grid(True, alpha=0.3) + +# Текст для отображения частот на графике +peak_text = ax1.text(0.02, 0.95, '', transform=ax1.transAxes, verticalalignment='top', + bbox=dict(boxstyle='round', facecolor='white', alpha=0.7), fontsize=12, color='darkgreen') + +# 2. Частотный график +freqs = np.fft.rfftfreq(SAMPLES, 1/FS) +line_spec_filt, = ax2.plot(freqs, np.zeros(len(freqs)), color='blue', lw=1.5, label='Спектр (После фильтров)', zorder=10) +fill_poly = None + +# Вертикальные линии для визуализации работы Notch-фильтров +peak_lines = [ax2.axvline(0, color='green', linestyle='--', alpha=0.0) for _ in range(3)] + +ax2.set_title("Частотный анализ (FFT)") +ax2.set_xlabel("Частота (Гц)") +ax2.set_xlim(0, 500) +ax2.set_ylim(0, 30000) +ax2.xaxis.set_major_locator(MultipleLocator(50)) +ax2.grid(True, alpha=0.3) + +def update(frame): + global raw_buffer, filt_buffer, data_packet, fill_poly, peak_freqs + + new_data = ser.read_all() + if new_data: + data_packet.extend(new_data) + + # Парсинг пакетов (длина 12) + while len(data_packet) >= PACKET_SIZE: + header_idx = data_packet.find(b'\xaa\xbb') + if header_idx == -1: + data_packet.clear() + break + + if header_idx + PACKET_SIZE <= len(data_packet): + # Читаем: 2(gx), 2(fgx), 2(f1), 2(f2), 2(f3) + chunk = data_packet[header_idx+2 : header_idx+PACKET_SIZE] + try: + # int16, int16, uint16, uint16, uint16 + r_val, f_val, f1, f2, f3 = struct.unpack(' 0: + peak_lines[i].set_xdata([peak_freqs[i], peak_freqs[i]]) + peak_lines[i].set_alpha(0.6) + else: + peak_lines[i].set_alpha(0.0) + + if fill_poly: + fill_poly.remove() + fill_poly = ax2.fill_between(freqs, 0, fft_r, color='red', alpha=0.15, zorder=1) + + # Автомасштаб спектра + #m = np.max(fft_r) if len(fft_r) > 0 else 5000 + #curr_limit = ax2.get_ylim()[1] + #if m > curr_limit: + # ax2.set_ylim(0, m * 1.2) + #elif m < curr_limit * 0.2 and curr_limit > 5000: + # ax2.set_ylim(0, 5000) + + return line_raw, line_filt, line_spec_filt, peak_text + +ani = FuncAnimation(fig, update, interval=30, cache_frame_data=False) +plt.tight_layout() +plt.show() +ser.close() \ No newline at end of file diff --git a/dsp_manager.c b/dsp_manager.c index e351550..57f7f70 100644 --- a/dsp_manager.c +++ b/dsp_manager.c @@ -1,5 +1,6 @@ #include "dsp_manager.h" #include "imu.h" +#include // Буферы для расчета static float32_t fft_input[FFT_SIZE]; @@ -9,12 +10,20 @@ static float32_t magnitudes[FFT_SIZE / 2]; // Буфер для окна Ханна (чтобы убрать шумы по краям выборки) static float32_t hann_window[FFT_SIZE]; -static uint16_t sample_count = 0; -uint8_t dsp_buffer_ready = 0; +// Коэффициенты биквадратного фильтра +static float32_t b[3] = {1.0f, -2.0f, 1.0f}; // Примерные значения +static float32_t a[3] = {1.0f, -1.8f, 0.81f}; + +// Буфер состояния фильтра +static float32_t x[3] = {0}; +static float32_t y[3] = {0}; // Структура БПФ из библиотеки static arm_rfft_fast_instance_f32 fft_handler; +// Уточнение области видимости переменной sample_count +static uint16_t sample_count = 0; + void DSP_Init(void) { // Инициализируем структуру БПФ arm_rfft_fast_init_f32(&fft_handler, FFT_SIZE); @@ -69,5 +78,13 @@ void DSP_Process(void) { if (top_mags[1] > 10.0f) biquad_init_notch(¬ch2, top_freqs[1], 1.0f, 1000.0f); if (top_mags[2] > 10.0f) biquad_init_notch(¬ch3, top_freqs[2], 1.0f, 1000.0f); + // 6. Применяем биквадратный фильтр к входным данным + for (int i = 0; i < FFT_SIZE; i++) { + fft_input[i] = Biquad_Filter(fft_input[i]); + } + dsp_buffer_ready = 0; // Разрешаем новый сбор данных -} \ No newline at end of file +} + +// Прототип функции Biquad_Filter +float32_t Biquad_Filter(float32_t input); \ No newline at end of file diff --git a/dsp_manager.h b/dsp_manager.h index eafa523..c45081e 100644 --- a/dsp_manager.h +++ b/dsp_manager.h @@ -14,4 +14,8 @@ void DSP_Process(void); // Запустить расчет (ког // Флаг готовности данных (чтобы main знал, когда пора вызывать Process) extern uint8_t dsp_buffer_ready; +// Добавление объявления переменной и прототипа функции +extern uint16_t sample_count; +float32_t Biquad_Filter(float32_t input); + #endif \ No newline at end of file