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Co-authored-by: Copilot <copilot@github.com>
This commit is contained in:
vadyschka01
2026-05-07 18:10:42 +03:00
parent e5ca7f608a
commit ef940ed92e
29 changed files with 764 additions and 484 deletions
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.vscode/iar-vsc.json
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@@ -3,7 +3,13 @@
"${workspaceFolder}\\fft_az.eww": {
"configs": {
"${workspaceFolder}\\fft_az.ewp": "Debug"
},
"selected": {
"path": "${workspaceFolder}\\fft_az.ewp"
}
}
},
"workspace": {
"path": "${workspaceFolder}\\fft_az.eww"
}
}
Debug/.cache/clangd/index/arm_math.h.3AAA648B3CFA8984.idx
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Debug/.cache/clangd/index/dsp_manager.c.6CC0D5AAAF07899B.idx
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Debug/.ninja_log
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# ninja log v6
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@@ -55,3 +55,4 @@
293 387 7997655194871884 C:/Users/vadychka/Documents/GitHub/leybl/fft/Debug/BrowseInfo/www_9707195405963337211.dir/motors.c.json 2ac33e42fc620caa
388 486 7997655195813518 C:/Users/vadychka/Documents/GitHub/leybl/fft/Debug/BrowseInfo/system_stm32g4xx.c.json f789283cdd1928d8
487 509 7997655196817487 C:/Users/vadychka/Documents/GitHub/leybl/fft/Debug/compile_commands.json b1b2177ae73507e4
0 26 7998536199727750 C:/Users/vadychka/Documents/GitHub/leybl/fft/Debug/compile_commands.json b1b2177ae73507e4
Debug/Exe/fft_az.out
BIN
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Debug/Exe/fft_az.sim
BIN
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Debug/List/fft_az.map
+349 -315
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@@ -1,6 +1,6 @@
###############################################################################
#
# IAR ELF Linker V9.70.1.475/W64 for ARM 06/May/2026 14:33:37
# IAR ELF Linker V9.70.1.475/W64 for ARM 07/May/2026 18:06:49
# Copyright 2007-2025 IAR Systems AB.
#
# Output file =
@@ -79,7 +79,7 @@ No sections matched the following patterns:
.intvec ro code 0x800'0000 4 0x1d8 startup_stm32g431xx.o [1]
- 0x800'01d8 0x1d8
"P1": 0x1'e868
"P1": 0x1'fbd8
.rodata const 0x800'01d8 4 0x8000 arm_common_tables.o [3]
.rodata const 0x800'81d8 4 0x4000 arm_common_tables.o [3]
.rodata const 0x800'c1d8 4 0x4000 arm_common_tables.o [3]
@@ -93,132 +93,139 @@ No sections matched the following patterns:
.rodata const 0x801'ad28 4 0x804 arm_common_tables.o [3]
.rodata const 0x801'b52c 4 0x800 arm_common_tables.o [3]
.rodata const 0x801'bd2c 4 0x800 arm_common_tables.o [3]
.rodata const 0x801'c52c 4 0x400 arm_common_tables.o [3]
.rodata const 0x801'c92c 4 0x400 arm_common_tables.o [3]
.rodata const 0x801'cd2c 4 0x380 arm_common_tables.o [3]
.rodata const 0x801'd0ac 4 0x370 arm_common_tables.o [3]
.text ro code 0x801'd41c 4 0x304 imu.o [1]
.rodata const 0x801'd720 4 0x200 arm_common_tables.o [3]
.rodata const 0x801'd920 4 0x200 arm_common_tables.o [3]
.text ro code 0x801'db20 4 0x1bc arm_rfft_fast_init_f32.o [3]
.text ro code 0x801'dcdc 4 0x98 arm_cfft_init_f32.o [3]
.text ro code 0x801'dd74 4 0x1b0 main.o [1]
.text ro code 0x801'df24 4 0xc8 motors.o [1]
.text ro code 0x801'dfec 4 0x5c dsp_manager.o [1]
.text ro code 0x801'e048 4 0x9c system_stm32g4xx.o [1]
.text ro code 0x801'e0e4 4 0x90 arm_cos_f32.o [3]
.rodata const 0x801'e174 4 0x1a0 arm_common_tables.o [3]
.rodata const 0x801'e314 4 0x100 arm_common_tables.o [3]
.rodata const 0x801'e414 4 0x100 arm_common_tables.o [3]
.rodata const 0x801'e514 4 0x80 arm_common_tables.o [3]
.rodata const 0x801'e594 4 0x80 arm_common_tables.o [3]
.rodata const 0x801'e614 4 0x70 arm_common_tables.o [3]
.rodata const 0x801'e684 4 0x60 arm_common_tables.o [3]
.text ro code 0x801'e6e4 2 0x38 zero_init3.o [5]
.text ro code 0x801'e71c 2 0x2a copy_init3.o [5]
.rodata const 0x801'e748 4 0x28 arm_common_tables.o [3]
.text ro code 0x801'e770 4 0x28 data_init.o [5]
.text ro code 0x801'e798 4 0x22 fpinit_M.o [4]
.text ro code 0x801'e7bc 4 0x22 cmain.o [5]
.text ro code 0x801'e7de 2 0x4 low_level_init.o [2]
.text ro code 0x801'e7e2 2 0x4 exit.o [2]
.text ro code 0x801'e7e8 4 0x4 cexit.o [5]
.text ro code 0x801'e7ec 4 0xa cexit_2.o [5]
.text ro code 0x801'e7f8 4 0x14 exit.o [6]
.iar.init_table const 0x801'e80c 4 0x24 - Linker created -
.text ro code 0x801'e830 4 0x1e cstartup_M.o [5]
.rodata const 0x801'e850 4 0x10 arm_const_structs.o [3]
.rodata const 0x801'e860 4 0x10 arm_const_structs.o [3]
.rodata const 0x801'e870 4 0x10 arm_const_structs.o [3]
.rodata const 0x801'e880 4 0x10 arm_const_structs.o [3]
.rodata const 0x801'e890 4 0x10 arm_const_structs.o [3]
.rodata const 0x801'e8a0 4 0x10 arm_const_structs.o [3]
.rodata const 0x801'e8b0 4 0x10 arm_const_structs.o [3]
.rodata const 0x801'e8c0 4 0x10 arm_const_structs.o [3]
.rodata const 0x801'e8d0 4 0x10 arm_const_structs.o [3]
.text ro code 0x801'e8e0 4 0x10 startup_stm32g431xx.o [1]
.text ro code 0x801'e8f0 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e8f4 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e8f8 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e8fc 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e900 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e904 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e908 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e90c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e910 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e914 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e918 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e91c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e920 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e924 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e928 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e92c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e930 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e934 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e938 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e93c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e940 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e944 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e948 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e94c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e950 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e954 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e958 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e95c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e960 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e964 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e968 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e96c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e970 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e974 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e978 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e97c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e980 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e984 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e988 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e98c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e990 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e994 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e998 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e99c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e9a0 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e9a4 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e9a8 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e9ac 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e9b0 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e9b4 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e9b8 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e9bc 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e9c0 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e9c4 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e9c8 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e9cc 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e9d0 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e9d4 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e9d8 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e9dc 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e9e0 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e9e4 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e9e8 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e9ec 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e9f0 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e9f4 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e9f8 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'e9fc 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'ea00 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'ea04 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'ea08 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'ea0c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'ea10 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'ea14 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'ea18 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'ea1c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'ea20 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'ea24 2 0x4 startup_stm32g431xx.o [1]
.rodata const 0x801'ea28 0x0 zero_init3.o [5]
.rodata const 0x801'ea28 0x0 copy_init3.o [5]
Initializer bytes const 0x801'ea28 4 0x18 <for P3 s0>
- 0x801'ea40 0x1'e868
.text ro code 0x801'c52c 4 0x704 arm_cfft_f32.o [3]
.text ro code 0x801'cc30 4 0x592 arm_cfft_radix8_f32.o [3]
.text ro code 0x801'd1c2 2 0x2a copy_init3.o [5]
.text ro code 0x801'd1ec 4 0x46 arm_bitreversal2.o [3]
.rodata const 0x801'd234 4 0x400 arm_common_tables.o [3]
.rodata const 0x801'd634 4 0x400 arm_common_tables.o [3]
.rodata const 0x801'da34 4 0x380 arm_common_tables.o [3]
.rodata const 0x801'ddb4 4 0x370 arm_common_tables.o [3]
.text ro code 0x801'e124 4 0x298 imu.o [1]
.text ro code 0x801'e3bc 4 0x284 dsp_manager.o [1]
.text ro code 0x801'e640 4 0x1bc arm_rfft_fast_init_f32.o [3]
.text ro code 0x801'e7fc 4 0x90 arm_cos_f32.o [3]
.text ro code 0x801'e88c 4 0x10e arm_mult_f32.o [3]
.text ro code 0x801'e99c 4 0x182 arm_rfft_fast_f32.o [3]
.text ro code 0x801'eb20 4 0x154 arm_cmplx_mag_f32.o [3]
.text ro code 0x801'ec74 4 0x8c arm_sin_f32.o [3]
.text ro code 0x801'ed00 4 0x98 arm_cfft_init_f32.o [3]
.text ro code 0x801'ed98 4 0x214 main.o [1]
.text ro code 0x801'efac 4 0xc8 motors.o [1]
.text ro code 0x801'f074 4 0x9c system_stm32g4xx.o [1]
.rodata const 0x801'f110 4 0x200 arm_common_tables.o [3]
.rodata const 0x801'f310 4 0x200 arm_common_tables.o [3]
.rodata const 0x801'f510 4 0x1a0 arm_common_tables.o [3]
.rodata const 0x801'f6b0 4 0x100 arm_common_tables.o [3]
.rodata const 0x801'f7b0 4 0x100 arm_common_tables.o [3]
.rodata const 0x801'f8b0 4 0x80 arm_common_tables.o [3]
.rodata const 0x801'f930 4 0x80 arm_common_tables.o [3]
.rodata const 0x801'f9b0 4 0x70 arm_common_tables.o [3]
.rodata const 0x801'fa20 4 0x60 arm_common_tables.o [3]
.text ro code 0x801'fa80 2 0x38 zero_init3.o [5]
.rodata const 0x801'fab8 4 0x28 arm_common_tables.o [3]
.text ro code 0x801'fae0 4 0x28 data_init.o [5]
.text ro code 0x801'fb08 4 0x22 fpinit_M.o [4]
.text ro code 0x801'fb2c 4 0x22 cmain.o [5]
.text ro code 0x801'fb4e 2 0x4 low_level_init.o [2]
.text ro code 0x801'fb52 2 0x4 exit.o [2]
.text ro code 0x801'fb58 4 0x4 cexit.o [5]
.text ro code 0x801'fb5c 4 0xa cexit_2.o [5]
.text ro code 0x801'fb68 4 0x14 exit.o [6]
.iar.init_table const 0x801'fb7c 4 0x24 - Linker created -
.text ro code 0x801'fba0 4 0x1e cstartup_M.o [5]
.rodata const 0x801'fbc0 4 0x10 arm_const_structs.o [3]
.rodata const 0x801'fbd0 4 0x10 arm_const_structs.o [3]
.rodata const 0x801'fbe0 4 0x10 arm_const_structs.o [3]
.rodata const 0x801'fbf0 4 0x10 arm_const_structs.o [3]
.rodata const 0x801'fc00 4 0x10 arm_const_structs.o [3]
.rodata const 0x801'fc10 4 0x10 arm_const_structs.o [3]
.rodata const 0x801'fc20 4 0x10 arm_const_structs.o [3]
.rodata const 0x801'fc30 4 0x10 arm_const_structs.o [3]
.rodata const 0x801'fc40 4 0x10 arm_const_structs.o [3]
.text ro code 0x801'fc50 4 0x10 startup_stm32g431xx.o [1]
.text ro code 0x801'fc60 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fc64 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fc68 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fc6c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fc70 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fc74 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fc78 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fc7c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fc80 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fc84 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fc88 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fc8c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fc90 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fc94 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fc98 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fc9c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fca0 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fca4 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fca8 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fcac 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fcb0 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fcb4 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fcb8 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fcbc 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fcc0 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fcc4 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fcc8 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fccc 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fcd0 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fcd4 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fcd8 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fcdc 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fce0 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fce4 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fce8 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fcec 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fcf0 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fcf4 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fcf8 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fcfc 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd00 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd04 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd08 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd0c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd10 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd14 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd18 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd1c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd20 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd24 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd28 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd2c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd30 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd34 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd38 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd3c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd40 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd44 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd48 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd4c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd50 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd54 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd58 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd5c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd60 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd64 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd68 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd6c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd70 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd74 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd78 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd7c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd80 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd84 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd88 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd8c 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd90 2 0x4 startup_stm32g431xx.o [1]
.text ro code 0x801'fd94 2 0x4 startup_stm32g431xx.o [1]
.rodata const 0x801'fd98 0x0 zero_init3.o [5]
.rodata const 0x801'fd98 0x0 copy_init3.o [5]
Initializer bytes const 0x801'fd98 4 0x18 <for P3 s0>
- 0x801'fdb0 0x1'fbd8
"P3", part 1 of 3: 0x18
P3 s0 0x2000'0000 0x18 <Init block>
@@ -226,23 +233,25 @@ No sections matched the following patterns:
.data inited 0x2000'0014 4 0x4 system_stm32g4xx.o [1]
- 0x2000'0018 0x18
"P3", part 2 of 3: 0x860
.bss zero 0x2000'0018 4 0x81c dsp_manager.o [1]
.bss zero 0x2000'0834 4 0x38 imu.o [1]
.bss zero 0x2000'086c 4 0xc imu.o [1]
- 0x2000'0878 0x860
"P3", part 2 of 3: 0x1c94
.bss zero 0x2000'0018 4 0xc18 dsp_manager.o [1]
.bss zero 0x2000'0c30 4 0x81c dsp_manager.o [1]
.bss zero 0x2000'144c 4 0x800 dsp_manager.o [1]
.bss zero 0x2000'1c4c 4 0x60 imu.o [1]
- 0x2000'1cac 0x1c94
"P3", part 3 of 3: 0x800
CSTACK 0x2000'0878 8 0x800 <Block>
CSTACK uninit 0x2000'0878 0x800 <Block tail>
- 0x2000'1078 0x800
CSTACK 0x2000'1cb0 8 0x800 <Block>
CSTACK uninit 0x2000'1cb0 0x800 <Block tail>
- 0x2000'24b0 0x800
Unused ranges:
From To Size
---- -- ----
0x801'ea40 0x801'ffff 0x15c0
0x2000'1078 0x2000'3fff 0x2f88
0x801'fdb0 0x801'ffff 0x250
0x2000'1cac 0x2000'1caf 0x4
0x2000'24b0 0x2000'3fff 0x1b50
0x2000'4000 0x2000'57ff 0x1800
@@ -253,14 +262,14 @@ Unused ranges:
Address Size
------- ----
Zero (__iar_zero_init3)
1 destination range, total size 0x860:
0x2000'0018 0x860
1 destination range, total size 0x1c94:
0x2000'0018 0x1c94
Copy (__iar_copy_init3)
1 source range, total size 0x18:
0x801'ea28 0x18
0x801'fd98 0x18
1 destination range, total size 0x18:
0x2000'0000 0x18
0x2000'0000 0x18
@@ -275,14 +284,14 @@ command line/config:
Total:
C:\Users\vadychka\Documents\GitHub\leybl\fft\Debug\Obj: [1]
dsp_manager.o 92 2'076
imu.o 772 68
main.o 432 20 20
dsp_manager.o 644 7'220
imu.o 664 96
main.o 532 20 20
motors.o 200
startup_stm32g431xx.o 800
system_stm32g4xx.o 156 4 4
---------------------------------------------------
Total: 2'452 24 2'168
Total: 2'996 24 7'340
dl7M_tln.a: [2]
exit.o 4
@@ -291,13 +300,20 @@ dl7M_tln.a: [2]
Total: 8
iar_cortexM4lf_math.a: [3]
arm_bitreversal2.o 70
arm_cfft_f32.o 1'796
arm_cfft_init_f32.o 152
arm_cfft_radix8_f32.o 1'426
arm_cmplx_mag_f32.o 340
arm_common_tables.o 121'820
arm_const_structs.o 144
arm_cos_f32.o 144
arm_mult_f32.o 270
arm_rfft_fast_f32.o 386
arm_rfft_fast_init_f32.o 444
arm_sin_f32.o 140
---------------------------------------------------
Total: 740 121'964
Total: 5'168 121'964
m7M_tls.a: [4]
fpinit_M.o 34
@@ -320,10 +336,10 @@ shb_l.a: [6]
---------------------------------------------------
Total: 20
Gaps 6 4
Gaps 10 4
Linker created 36 2'048
-------------------------------------------------------
Grand Total: 3'476 122'028 4'216
Grand Total: 8'452 122'028 9'388
*******************************************************************************
@@ -332,222 +348,240 @@ shb_l.a: [6]
Entry Address Size Type Object
----- ------- ---- ---- ------
.iar.init_table$$Base 0x801'e80c -- Gb - Linker created -
.iar.init_table$$Limit 0x801'e830 -- Gb - Linker created -
?main 0x801'e7bd Code Gb cmain.o [5]
ADC1_2_IRQHandler 0x801'e959 Code Wk startup_stm32g431xx.o [1]
AHBPrescTable 0x801'e0d4 0x10 Data Gb system_stm32g4xx.o [1]
BusFault_Handler 0x801'e8fd Code Wk startup_stm32g431xx.o [1]
COMP1_2_3_IRQHandler 0x801'e9f5 Code Wk startup_stm32g431xx.o [1]
COMP4_IRQHandler 0x801'e9f9 Code Wk startup_stm32g431xx.o [1]
CORDIC_IRQHandler 0x801'ea21 Code Wk startup_stm32g431xx.o [1]
CRS_IRQHandler 0x801'e9fd Code Wk startup_stm32g431xx.o [1]
CSTACK$$Base 0x2000'0878 -- Gb - Linker created -
CSTACK$$Limit 0x2000'1078 -- Gb - Linker created -
.iar.init_table$$Base 0x801'fb7c -- Gb - Linker created -
.iar.init_table$$Limit 0x801'fba0 -- Gb - Linker created -
?main 0x801'fb2d Code Gb cmain.o [5]
ADC1_2_IRQHandler 0x801'fcc9 Code Wk startup_stm32g431xx.o [1]
AHBPrescTable 0x801'f100 0x10 Data Gb system_stm32g4xx.o [1]
BusFault_Handler 0x801'fc6d Code Wk startup_stm32g431xx.o [1]
COMP1_2_3_IRQHandler 0x801'fd65 Code Wk startup_stm32g431xx.o [1]
COMP4_IRQHandler 0x801'fd69 Code Wk startup_stm32g431xx.o [1]
CORDIC_IRQHandler 0x801'fd91 Code Wk startup_stm32g431xx.o [1]
CRS_IRQHandler 0x801'fd6d Code Wk startup_stm32g431xx.o [1]
CSTACK$$Base 0x2000'1cb0 -- Gb - Linker created -
CSTACK$$Limit 0x2000'24b0 -- Gb - Linker created -
DMA1_Channel1_IRQHandler
0x801'e941 Code Wk startup_stm32g431xx.o [1]
0x801'fcb1 Code Wk startup_stm32g431xx.o [1]
DMA1_Channel2_IRQHandler
0x801'e945 Code Wk startup_stm32g431xx.o [1]
0x801'fcb5 Code Wk startup_stm32g431xx.o [1]
DMA1_Channel3_IRQHandler
0x801'e949 Code Wk startup_stm32g431xx.o [1]
0x801'fcb9 Code Wk startup_stm32g431xx.o [1]
DMA1_Channel4_IRQHandler
0x801'e94d Code Wk startup_stm32g431xx.o [1]
0x801'fcbd Code Wk startup_stm32g431xx.o [1]
DMA1_Channel5_IRQHandler
0x801'e951 Code Wk startup_stm32g431xx.o [1]
0x801'fcc1 Code Wk startup_stm32g431xx.o [1]
DMA1_Channel6_IRQHandler
0x801'e955 Code Wk startup_stm32g431xx.o [1]
0x801'fcc5 Code Wk startup_stm32g431xx.o [1]
DMA2_Channel1_IRQHandler
0x801'e9dd Code Wk startup_stm32g431xx.o [1]
0x801'fd4d Code Wk startup_stm32g431xx.o [1]
DMA2_Channel2_IRQHandler
0x801'e9e1 Code Wk startup_stm32g431xx.o [1]
0x801'fd51 Code Wk startup_stm32g431xx.o [1]
DMA2_Channel3_IRQHandler
0x801'e9e5 Code Wk startup_stm32g431xx.o [1]
0x801'fd55 Code Wk startup_stm32g431xx.o [1]
DMA2_Channel4_IRQHandler
0x801'e9e9 Code Wk startup_stm32g431xx.o [1]
0x801'fd59 Code Wk startup_stm32g431xx.o [1]
DMA2_Channel5_IRQHandler
0x801'e9ed Code Wk startup_stm32g431xx.o [1]
0x801'fd5d Code Wk startup_stm32g431xx.o [1]
DMA2_Channel6_IRQHandler
0x801'ea1d Code Wk startup_stm32g431xx.o [1]
DMAMUX_OVR_IRQHandler 0x801'ea19 Code Wk startup_stm32g431xx.o [1]
DSP_Init 0x801'dfed 0x50 Code Gb dsp_manager.o [1]
DebugMon_Handler 0x801'e909 Code Wk startup_stm32g431xx.o [1]
EXTI0_IRQHandler 0x801'e92d Code Wk startup_stm32g431xx.o [1]
EXTI15_10_IRQHandler 0x801'e9b1 Code Wk startup_stm32g431xx.o [1]
EXTI1_IRQHandler 0x801'e931 Code Wk startup_stm32g431xx.o [1]
EXTI2_IRQHandler 0x801'e935 Code Wk startup_stm32g431xx.o [1]
EXTI3_IRQHandler 0x801'e939 Code Wk startup_stm32g431xx.o [1]
EXTI4_IRQHandler 0x801'e93d Code Wk startup_stm32g431xx.o [1]
EXTI9_5_IRQHandler 0x801'e96d Code Wk startup_stm32g431xx.o [1]
FDCAN1_IT0_IRQHandler 0x801'e965 Code Wk startup_stm32g431xx.o [1]
FDCAN1_IT1_IRQHandler 0x801'e969 Code Wk startup_stm32g431xx.o [1]
FLASH_IRQHandler 0x801'e925 Code Wk startup_stm32g431xx.o [1]
FMAC_IRQHandler 0x801'ea25 Code Wk startup_stm32g431xx.o [1]
FMAC_Init 0x801'd41d 0x4a Code Gb imu.o [1]
FMAC_Process_Sample 0x801'd6ad 0x3e Code Gb imu.o [1]
FMAC_Step 0x801'd61d 0x90 Code Lc imu.o [1]
FPU_IRQHandler 0x801'ea05 Code Wk startup_stm32g431xx.o [1]
HardFault_Handler 0x801'e8f5 Code Wk startup_stm32g431xx.o [1]
I2C1_ER_IRQHandler 0x801'e991 Code Wk startup_stm32g431xx.o [1]
I2C1_EV_IRQHandler 0x801'e98d Code Wk startup_stm32g431xx.o [1]
I2C1_Init 0x801'd467 0x4c Code Gb imu.o [1]
I2C2_ER_IRQHandler 0x801'e999 Code Wk startup_stm32g431xx.o [1]
I2C2_EV_IRQHandler 0x801'e995 Code Wk startup_stm32g431xx.o [1]
I2C3_ER_IRQHandler 0x801'ea15 Code Wk startup_stm32g431xx.o [1]
I2C3_EV_IRQHandler 0x801'ea11 Code Wk startup_stm32g431xx.o [1]
I2C_ReadMulti 0x801'd4b3 0x40 Code Gb imu.o [1]
IMU_Calibrate 0x801'd593 0x4c Code Gb imu.o [1]
IMU_Init 0x801'd525 0x6e Code Gb imu.o [1]
IMU_ReadRawData 0x801'd5df 0x3c Code Gb imu.o [1]
IMU_SetBank 0x801'd51b 0xa Code Gb imu.o [1]
IMU_WriteReg 0x801'd4f3 0x28 Code Lc imu.o [1]
LPTIM1_IRQHandler 0x801'e9cd Code Wk startup_stm32g431xx.o [1]
LPUART1_IRQHandler 0x801'ea0d Code Wk startup_stm32g431xx.o [1]
MemManage_Handler 0x801'e8f9 Code Wk startup_stm32g431xx.o [1]
Motors_Init 0x801'df25 0x9a Code Gb motors.o [1]
NMI_Handler 0x801'e8f1 Code Wk startup_stm32g431xx.o [1]
PVD_PVM_IRQHandler 0x801'e919 Code Wk startup_stm32g431xx.o [1]
PendSV_Handler 0x801'e90d Code Wk startup_stm32g431xx.o [1]
RCC_IRQHandler 0x801'e929 Code Wk startup_stm32g431xx.o [1]
RNG_IRQHandler 0x801'ea09 Code Wk startup_stm32g431xx.o [1]
RTC_Alarm_IRQHandler 0x801'e9b5 Code Wk startup_stm32g431xx.o [1]
0x801'fd8d Code Wk startup_stm32g431xx.o [1]
DMAMUX_OVR_IRQHandler 0x801'fd89 Code Wk startup_stm32g431xx.o [1]
DSP_AddSample 0x801'e40d 0x2c Code Gb dsp_manager.o [1]
DSP_Init 0x801'e3bd 0x50 Code Gb dsp_manager.o [1]
DSP_Process 0x801'e439 0x1d2 Code Gb dsp_manager.o [1]
DebugMon_Handler 0x801'fc79 Code Wk startup_stm32g431xx.o [1]
EXTI0_IRQHandler 0x801'fc9d Code Wk startup_stm32g431xx.o [1]
EXTI15_10_IRQHandler 0x801'fd21 Code Wk startup_stm32g431xx.o [1]
EXTI1_IRQHandler 0x801'fca1 Code Wk startup_stm32g431xx.o [1]
EXTI2_IRQHandler 0x801'fca5 Code Wk startup_stm32g431xx.o [1]
EXTI3_IRQHandler 0x801'fca9 Code Wk startup_stm32g431xx.o [1]
EXTI4_IRQHandler 0x801'fcad Code Wk startup_stm32g431xx.o [1]
EXTI9_5_IRQHandler 0x801'fcdd Code Wk startup_stm32g431xx.o [1]
FDCAN1_IT0_IRQHandler 0x801'fcd5 Code Wk startup_stm32g431xx.o [1]
FDCAN1_IT1_IRQHandler 0x801'fcd9 Code Wk startup_stm32g431xx.o [1]
FLASH_IRQHandler 0x801'fc95 Code Wk startup_stm32g431xx.o [1]
FMAC_IRQHandler 0x801'fd95 Code Wk startup_stm32g431xx.o [1]
FMAC_Init 0x801'e125 0x4a Code Gb imu.o [1]
FPU_IRQHandler 0x801'fd75 Code Wk startup_stm32g431xx.o [1]
HardFault_Handler 0x801'fc65 Code Wk startup_stm32g431xx.o [1]
I2C1_ER_IRQHandler 0x801'fd01 Code Wk startup_stm32g431xx.o [1]
I2C1_EV_IRQHandler 0x801'fcfd Code Wk startup_stm32g431xx.o [1]
I2C1_Init 0x801'e16f 0x4c Code Gb imu.o [1]
I2C2_ER_IRQHandler 0x801'fd09 Code Wk startup_stm32g431xx.o [1]
I2C2_EV_IRQHandler 0x801'fd05 Code Wk startup_stm32g431xx.o [1]
I2C3_ER_IRQHandler 0x801'fd85 Code Wk startup_stm32g431xx.o [1]
I2C3_EV_IRQHandler 0x801'fd81 Code Wk startup_stm32g431xx.o [1]
I2C_ReadMulti 0x801'e1bb 0x40 Code Gb imu.o [1]
IMU_Calibrate 0x801'e2d1 0x4c Code Gb imu.o [1]
IMU_Init 0x801'e26b 0x66 Code Gb imu.o [1]
IMU_ReadRawData 0x801'e31d 0x54 Code Gb imu.o [1]
IMU_SetBank 0x801'e223 0xa Code Gb imu.o [1]
IMU_WriteReg 0x801'e1fb 0x28 Code Lc imu.o [1]
LPTIM1_IRQHandler 0x801'fd3d Code Wk startup_stm32g431xx.o [1]
LPUART1_IRQHandler 0x801'fd7d Code Wk startup_stm32g431xx.o [1]
MemManage_Handler 0x801'fc69 Code Wk startup_stm32g431xx.o [1]
Motors_Init 0x801'efad 0x9a Code Gb motors.o [1]
NMI_Handler 0x801'fc61 Code Wk startup_stm32g431xx.o [1]
PVD_PVM_IRQHandler 0x801'fc89 Code Wk startup_stm32g431xx.o [1]
PendSV_Handler 0x801'fc7d Code Wk startup_stm32g431xx.o [1]
RCC_IRQHandler 0x801'fc99 Code Wk startup_stm32g431xx.o [1]
RNG_IRQHandler 0x801'fd79 Code Wk startup_stm32g431xx.o [1]
RTC_Alarm_IRQHandler 0x801'fd25 Code Wk startup_stm32g431xx.o [1]
RTC_TAMP_LSECSS_IRQHandler
0x801'e91d Code Wk startup_stm32g431xx.o [1]
RTC_WKUP_IRQHandler 0x801'e921 Code Wk startup_stm32g431xx.o [1]
Region$$Table$$Base 0x801'e80c -- Gb - Linker created -
Region$$Table$$Limit 0x801'e830 -- Gb - Linker created -
Reset_Handler 0x801'e8e1 Code Wk startup_stm32g431xx.o [1]
SAI1_IRQHandler 0x801'ea01 Code Wk startup_stm32g431xx.o [1]
SPI1_IRQHandler 0x801'e99d Code Wk startup_stm32g431xx.o [1]
SPI2_IRQHandler 0x801'e9a1 Code Wk startup_stm32g431xx.o [1]
SPI3_IRQHandler 0x801'e9d1 Code Wk startup_stm32g431xx.o [1]
SVC_Handler 0x801'e905 Code Wk startup_stm32g431xx.o [1]
Set_Motor_Individual 0x801'dfcd 0x10 Code Gb motors.o [1]
Set_Motors 0x801'dfbf 0xe Code Gb motors.o [1]
SysTick_Handler 0x801'e911 Code Wk startup_stm32g431xx.o [1]
0x801'fc8d Code Wk startup_stm32g431xx.o [1]
RTC_WKUP_IRQHandler 0x801'fc91 Code Wk startup_stm32g431xx.o [1]
Region$$Table$$Base 0x801'fb7c -- Gb - Linker created -
Region$$Table$$Limit 0x801'fba0 -- Gb - Linker created -
Reset_Handler 0x801'fc51 Code Wk startup_stm32g431xx.o [1]
SAI1_IRQHandler 0x801'fd71 Code Wk startup_stm32g431xx.o [1]
SPI1_IRQHandler 0x801'fd0d Code Wk startup_stm32g431xx.o [1]
SPI2_IRQHandler 0x801'fd11 Code Wk startup_stm32g431xx.o [1]
SPI3_IRQHandler 0x801'fd41 Code Wk startup_stm32g431xx.o [1]
SVC_Handler 0x801'fc75 Code Wk startup_stm32g431xx.o [1]
Set_Motor_Individual 0x801'f055 0x10 Code Gb motors.o [1]
Set_Motors 0x801'f047 0xe Code Gb motors.o [1]
SysTick_Handler 0x801'fc81 Code Wk startup_stm32g431xx.o [1]
SystemClock_Config_160MHz
0x801'ddf7 0x4c Code Gb main.o [1]
0x801'ee79 0x4c Code Gb main.o [1]
SystemCoreClock 0x2000'0014 0x4 Data Gb system_stm32g4xx.o [1]
SystemCoreClockUpdate 0x801'e055 0x6c Code Gb system_stm32g4xx.o [1]
SystemInit 0x801'e049 0xc Code Gb system_stm32g4xx.o [1]
SystemCoreClockUpdate 0x801'f081 0x6c Code Gb system_stm32g4xx.o [1]
SystemInit 0x801'f075 0xc Code Gb system_stm32g4xx.o [1]
TIM1_BRK_TIM15_IRQHandler
0x801'e971 Code Wk startup_stm32g431xx.o [1]
TIM1_CC_IRQHandler 0x801'e97d Code Wk startup_stm32g431xx.o [1]
0x801'fce1 Code Wk startup_stm32g431xx.o [1]
TIM1_CC_IRQHandler 0x801'fced Code Wk startup_stm32g431xx.o [1]
TIM1_TRG_COM_TIM17_IRQHandler
0x801'e979 Code Wk startup_stm32g431xx.o [1]
0x801'fce9 Code Wk startup_stm32g431xx.o [1]
TIM1_UP_TIM16_IRQHandler
0x801'e975 Code Wk startup_stm32g431xx.o [1]
TIM2_IRQHandler 0x801'e981 Code Wk startup_stm32g431xx.o [1]
TIM3_IRQHandler 0x801'e985 Code Wk startup_stm32g431xx.o [1]
TIM4_IRQHandler 0x801'e989 Code Wk startup_stm32g431xx.o [1]
TIM6_DAC_IRQHandler 0x801'ded9 0x14 Code Gb main.o [1]
TIM6_Init_1000Hz 0x801'dea9 0x30 Code Gb main.o [1]
TIM7_IRQHandler 0x801'e9d9 Code Wk startup_stm32g431xx.o [1]
TIM8_BRK_IRQHandler 0x801'e9bd Code Wk startup_stm32g431xx.o [1]
TIM8_CC_IRQHandler 0x801'e9c9 Code Wk startup_stm32g431xx.o [1]
0x801'fce5 Code Wk startup_stm32g431xx.o [1]
TIM2_IRQHandler 0x801'fcf1 Code Wk startup_stm32g431xx.o [1]
TIM3_IRQHandler 0x801'fcf5 Code Wk startup_stm32g431xx.o [1]
TIM4_IRQHandler 0x801'fcf9 Code Wk startup_stm32g431xx.o [1]
TIM6_DAC_IRQHandler 0x801'ef59 0x14 Code Gb main.o [1]
TIM6_Init_1000Hz 0x801'ef29 0x30 Code Gb main.o [1]
TIM7_IRQHandler 0x801'fd49 Code Wk startup_stm32g431xx.o [1]
TIM8_BRK_IRQHandler 0x801'fd2d Code Wk startup_stm32g431xx.o [1]
TIM8_CC_IRQHandler 0x801'fd39 Code Wk startup_stm32g431xx.o [1]
TIM8_TRG_COM_IRQHandler
0x801'e9c5 Code Wk startup_stm32g431xx.o [1]
TIM8_UP_IRQHandler 0x801'e9c1 Code Wk startup_stm32g431xx.o [1]
UART2_Init_921600 0x801'de43 0x48 Code Gb main.o [1]
UART4_IRQHandler 0x801'e9d5 Code Wk startup_stm32g431xx.o [1]
UART_SendPacket 0x801'de8b 0x1c Code Gb main.o [1]
UCPD1_IRQHandler 0x801'e9f1 Code Wk startup_stm32g431xx.o [1]
USART1_IRQHandler 0x801'e9a5 Code Wk startup_stm32g431xx.o [1]
USART2_IRQHandler 0x801'e9a9 Code Wk startup_stm32g431xx.o [1]
USART3_IRQHandler 0x801'e9ad Code Wk startup_stm32g431xx.o [1]
USBWakeUp_IRQHandler 0x801'e9b9 Code Wk startup_stm32g431xx.o [1]
USB_HP_IRQHandler 0x801'e95d Code Wk startup_stm32g431xx.o [1]
USB_LP_IRQHandler 0x801'e961 Code Wk startup_stm32g431xx.o [1]
UsageFault_Handler 0x801'e901 Code Wk startup_stm32g431xx.o [1]
WWDG_IRQHandler 0x801'e915 Code Wk startup_stm32g431xx.o [1]
__cmain 0x801'e7bd Code Gb cmain.o [5]
__exit 0x801'e7f9 0x14 Code Gb exit.o [6]
__iar_copy_init3 0x801'e71d 0x2a Code Gb copy_init3.o [5]
__iar_data_init3 0x801'e771 0x28 Code Gb data_init.o [5]
__iar_init_vfp 0x801'e799 Code Gb fpinit_M.o [4]
__iar_program_start 0x801'e831 Code Gb cstartup_M.o [5]
__iar_zero_init3 0x801'e6e5 0x38 Code Gb zero_init3.o [5]
__low_level_init 0x801'e7df 0x4 Code Gb low_level_init.o [2]
0x801'fd35 Code Wk startup_stm32g431xx.o [1]
TIM8_UP_IRQHandler 0x801'fd31 Code Wk startup_stm32g431xx.o [1]
UART2_Init_921600 0x801'eec5 0x48 Code Gb main.o [1]
UART4_IRQHandler 0x801'fd45 Code Wk startup_stm32g431xx.o [1]
UART_SendPacket 0x801'ef0d 0x1c Code Gb main.o [1]
UCPD1_IRQHandler 0x801'fd61 Code Wk startup_stm32g431xx.o [1]
USART1_IRQHandler 0x801'fd15 Code Wk startup_stm32g431xx.o [1]
USART2_IRQHandler 0x801'fd19 Code Wk startup_stm32g431xx.o [1]
USART3_IRQHandler 0x801'fd1d Code Wk startup_stm32g431xx.o [1]
USBWakeUp_IRQHandler 0x801'fd29 Code Wk startup_stm32g431xx.o [1]
USB_HP_IRQHandler 0x801'fccd Code Wk startup_stm32g431xx.o [1]
USB_LP_IRQHandler 0x801'fcd1 Code Wk startup_stm32g431xx.o [1]
Update_FMAC_Coeffs 0x801'e371 0x22 Code Gb imu.o [1]
UsageFault_Handler 0x801'fc71 Code Wk startup_stm32g431xx.o [1]
WWDG_IRQHandler 0x801'fc85 Code Wk startup_stm32g431xx.o [1]
__cmain 0x801'fb2d Code Gb cmain.o [5]
__exit 0x801'fb69 0x14 Code Gb exit.o [6]
__iar_copy_init3 0x801'd1c3 0x2a Code Gb copy_init3.o [5]
__iar_data_init3 0x801'fae1 0x28 Code Gb data_init.o [5]
__iar_init_vfp 0x801'fb09 Code Gb fpinit_M.o [4]
__iar_program_start 0x801'fba1 Code Gb cstartup_M.o [5]
__iar_zero_init3 0x801'fa81 0x38 Code Gb zero_init3.o [5]
__low_level_init 0x801'fb4f 0x4 Code Gb low_level_init.o [2]
__vector_table 0x800'0000 Data Gb startup_stm32g431xx.o [1]
_call_main 0x801'e7c9 Code Gb cmain.o [5]
_exit 0x801'e7e9 Code Gb cexit.o [5]
_exit_2 0x801'e7ed Code Gb cexit_2.o [5]
_call_main 0x801'fb39 Code Gb cmain.o [5]
_exit 0x801'fb59 Code Gb cexit.o [5]
_exit_2 0x801'fb5d Code Gb cexit_2.o [5]
active_notch_freqs 0x2000'0418 0xc Data Gb dsp_manager.o [1]
armBitRevIndexTable1024
0x801'9f18 0xe10 Data Gb arm_common_tables.o [3]
armBitRevIndexTable128 0x801'e174 0x1a0 Data Gb arm_common_tables.o [3]
armBitRevIndexTable16 0x801'e748 0x28 Data Gb arm_common_tables.o [3]
armBitRevIndexTable128 0x801'f510 0x1a0 Data Gb arm_common_tables.o [3]
armBitRevIndexTable16 0x801'fab8 0x28 Data Gb arm_common_tables.o [3]
armBitRevIndexTable2048
0x801'6158 0x1dc0 Data Gb arm_common_tables.o [3]
armBitRevIndexTable256 0x801'd0ac 0x370 Data Gb arm_common_tables.o [3]
armBitRevIndexTable32 0x801'e684 0x60 Data Gb arm_common_tables.o [3]
armBitRevIndexTable256 0x801'ddb4 0x370 Data Gb arm_common_tables.o [3]
armBitRevIndexTable32 0x801'fa20 0x60 Data Gb arm_common_tables.o [3]
armBitRevIndexTable4096
0x801'41d8 0x1f80 Data Gb arm_common_tables.o [3]
armBitRevIndexTable512 0x801'cd2c 0x380 Data Gb arm_common_tables.o [3]
armBitRevIndexTable64 0x801'e614 0x70 Data Gb arm_common_tables.o [3]
arm_cfft_init_f32 0x801'dcdd 0x98 Code Gb arm_cfft_init_f32.o [3]
armBitRevIndexTable512 0x801'da34 0x380 Data Gb arm_common_tables.o [3]
armBitRevIndexTable64 0x801'f9b0 0x70 Data Gb arm_common_tables.o [3]
arm_bitreversal_32 0x801'd1ed 0x46 Code Gb arm_bitreversal2.o [3]
arm_cfft_f32 0x801'caad 0x184 Code Gb arm_cfft_f32.o [3]
arm_cfft_init_f32 0x801'ed01 0x98 Code Gb arm_cfft_init_f32.o [3]
arm_cfft_radix8by2_f32 0x801'c52d 0x16a Code Gb arm_cfft_f32.o [3]
arm_cfft_radix8by4_f32 0x801'c699 0x412 Code Gb arm_cfft_f32.o [3]
arm_cfft_sR_f32_len1024
0x801'e8b0 0x10 Data Gb arm_const_structs.o [3]
arm_cfft_sR_f32_len128 0x801'e880 0x10 Data Gb arm_const_structs.o [3]
arm_cfft_sR_f32_len16 0x801'e850 0x10 Data Gb arm_const_structs.o [3]
0x801'fc20 0x10 Data Gb arm_const_structs.o [3]
arm_cfft_sR_f32_len128 0x801'fbf0 0x10 Data Gb arm_const_structs.o [3]
arm_cfft_sR_f32_len16 0x801'fbc0 0x10 Data Gb arm_const_structs.o [3]
arm_cfft_sR_f32_len2048
0x801'e8c0 0x10 Data Gb arm_const_structs.o [3]
arm_cfft_sR_f32_len256 0x801'e890 0x10 Data Gb arm_const_structs.o [3]
arm_cfft_sR_f32_len32 0x801'e860 0x10 Data Gb arm_const_structs.o [3]
0x801'fc30 0x10 Data Gb arm_const_structs.o [3]
arm_cfft_sR_f32_len256 0x801'fc00 0x10 Data Gb arm_const_structs.o [3]
arm_cfft_sR_f32_len32 0x801'fbd0 0x10 Data Gb arm_const_structs.o [3]
arm_cfft_sR_f32_len4096
0x801'e8d0 0x10 Data Gb arm_const_structs.o [3]
arm_cfft_sR_f32_len512 0x801'e8a0 0x10 Data Gb arm_const_structs.o [3]
arm_cfft_sR_f32_len64 0x801'e870 0x10 Data Gb arm_const_structs.o [3]
arm_cos_f32 0x801'e0e5 0x90 Code Gb arm_cos_f32.o [3]
0x801'fc40 0x10 Data Gb arm_const_structs.o [3]
arm_cfft_sR_f32_len512 0x801'fc10 0x10 Data Gb arm_const_structs.o [3]
arm_cfft_sR_f32_len64 0x801'fbe0 0x10 Data Gb arm_const_structs.o [3]
arm_cmplx_mag_f32 0x801'eb21 0x154 Code Gb arm_cmplx_mag_f32.o [3]
arm_cos_f32 0x801'e7fd 0x90 Code Gb arm_cos_f32.o [3]
arm_mult_f32 0x801'e88d 0x10e Code Gb arm_mult_f32.o [3]
arm_radix8_butterfly_f32
0x801'cc31 0x592 Code Gb arm_cfft_radix8_f32.o [3]
arm_rfft_1024_fast_init_f32
0x801'dbd1 0x26 Code Lc arm_rfft_fast_init_f32.o [3]
0x801'e6f1 0x26 Code Lc arm_rfft_fast_init_f32.o [3]
arm_rfft_128_fast_init_f32
0x801'db65 0x22 Code Lc arm_rfft_fast_init_f32.o [3]
0x801'e685 0x22 Code Lc arm_rfft_fast_init_f32.o [3]
arm_rfft_2048_fast_init_f32
0x801'dbf7 0x26 Code Lc arm_rfft_fast_init_f32.o [3]
0x801'e717 0x26 Code Lc arm_rfft_fast_init_f32.o [3]
arm_rfft_256_fast_init_f32
0x801'db87 0x24 Code Lc arm_rfft_fast_init_f32.o [3]
0x801'e6a7 0x24 Code Lc arm_rfft_fast_init_f32.o [3]
arm_rfft_32_fast_init_f32
0x801'db21 0x22 Code Lc arm_rfft_fast_init_f32.o [3]
0x801'e641 0x22 Code Lc arm_rfft_fast_init_f32.o [3]
arm_rfft_4096_fast_init_f32
0x801'dc1d 0x26 Code Lc arm_rfft_fast_init_f32.o [3]
0x801'e73d 0x26 Code Lc arm_rfft_fast_init_f32.o [3]
arm_rfft_512_fast_init_f32
0x801'dbab 0x26 Code Lc arm_rfft_fast_init_f32.o [3]
0x801'e6cb 0x26 Code Lc arm_rfft_fast_init_f32.o [3]
arm_rfft_64_fast_init_f32
0x801'db43 0x22 Code Lc arm_rfft_fast_init_f32.o [3]
arm_rfft_fast_init_f32 0x801'dc43 0x5a Code Gb arm_rfft_fast_init_f32.o [3]
dsp_buffer_ready 0x2000'0018 0x1 Data Gb dsp_manager.o [1]
exit 0x801'e7e3 0x4 Code Gb exit.o [2]
fft_handler 0x2000'081c 0x18 Data Lc dsp_manager.o [1]
filt_gx 0x2000'0870 0x4 Data Gb imu.o [1]
gyro_bias_x 0x2000'0874 0x4 Data Gb imu.o [1]
hann_window 0x2000'001c 0x800 Data Lc dsp_manager.o [1]
0x801'e663 0x22 Code Lc arm_rfft_fast_init_f32.o [3]
arm_rfft_fast_f32 0x801'eae5 0x3a Code Gb arm_rfft_fast_f32.o [3]
arm_rfft_fast_init_f32 0x801'e763 0x5a Code Gb arm_rfft_fast_init_f32.o [3]
arm_sin_f32 0x801'ec75 0x8c Code Gb arm_sin_f32.o [3]
biquad_apply 0x801'e22d 0x3e Code Gb imu.o [1]
dsp_buffer_ready 0x2000'0c30 0x1 Data Gb dsp_manager.o [1]
dyn_notch_filters 0x2000'1c50 0x54 Data Gb imu.o [1]
exit 0x801'fb53 0x4 Code Gb exit.o [2]
fft_handler 0x2000'1434 0x18 Data Lc dsp_manager.o [1]
fft_input 0x2000'144c 0x800 Data Lc dsp_manager.o [1]
fft_output 0x2000'0430 0x800 Data Lc dsp_manager.o [1]
filt_gx 0x2000'1ca4 0x4 Data Gb imu.o [1]
gyro_bias_x 0x2000'1ca8 0x4 Data Gb imu.o [1]
hann_window 0x2000'0c34 0x800 Data Lc dsp_manager.o [1]
imu_flag 0x2000'0000 0x1 Data Gb main.o [1]
m1_speed 0x2000'0004 0x4 Data Gb main.o [1]
m2_speed 0x2000'0008 0x4 Data Gb main.o [1]
m3_speed 0x2000'000c 0x4 Data Gb main.o [1]
m4_speed 0x2000'0010 0x4 Data Gb main.o [1]
main 0x801'dd75 0x82 Code Gb main.o [1]
notch_fmac_coeffs 0x2000'0834 0x20 Data Gb imu.o [1]
notch_fmac_state 0x2000'0854 0x18 Data Gb imu.o [1]
raw_gx 0x2000'086c 0x2 Data Gb imu.o [1]
sample_count 0x2000'001a 0x2 Data Lc dsp_manager.o [1]
magnitudes 0x2000'0018 0x400 Data Lc dsp_manager.o [1]
main 0x801'ed99 0xe0 Code Gb main.o [1]
merge_rfft_f32 0x801'ea45 0xa0 Code Gb arm_rfft_fast_f32.o [3]
raw_gx 0x2000'1c4c 0x2 Data Gb imu.o [1]
sample_count 0x2000'0c32 0x2 Data Lc dsp_manager.o [1]
sinTable_f32 0x801'ad28 0x804 Data Gb arm_common_tables.o [3]
smoothed_freqs 0x2000'0424 0xc Data Lc dsp_manager.o [1]
stage_rfft_f32 0x801'e99d 0xa8 Code Gb arm_rfft_fast_f32.o [3]
twiddleCoef_1024 0x801'01d8 0x2000 Data Gb arm_common_tables.o [3]
twiddleCoef_128 0x801'c52c 0x400 Data Gb arm_common_tables.o [3]
twiddleCoef_16 0x801'e514 0x80 Data Gb arm_common_tables.o [3]
twiddleCoef_128 0x801'd234 0x400 Data Gb arm_common_tables.o [3]
twiddleCoef_16 0x801'f8b0 0x80 Data Gb arm_common_tables.o [3]
twiddleCoef_2048 0x800'81d8 0x4000 Data Gb arm_common_tables.o [3]
twiddleCoef_256 0x801'b52c 0x800 Data Gb arm_common_tables.o [3]
twiddleCoef_32 0x801'e314 0x100 Data Gb arm_common_tables.o [3]
twiddleCoef_32 0x801'f6b0 0x100 Data Gb arm_common_tables.o [3]
twiddleCoef_4096 0x800'01d8 0x8000 Data Gb arm_common_tables.o [3]
twiddleCoef_512 0x801'7f18 0x1000 Data Gb arm_common_tables.o [3]
twiddleCoef_64 0x801'd720 0x200 Data Gb arm_common_tables.o [3]
twiddleCoef_64 0x801'f110 0x200 Data Gb arm_common_tables.o [3]
twiddleCoef_rfft_1024 0x801'8f18 0x1000 Data Gb arm_common_tables.o [3]
twiddleCoef_rfft_128 0x801'd920 0x200 Data Gb arm_common_tables.o [3]
twiddleCoef_rfft_128 0x801'f310 0x200 Data Gb arm_common_tables.o [3]
twiddleCoef_rfft_2048 0x801'21d8 0x2000 Data Gb arm_common_tables.o [3]
twiddleCoef_rfft_256 0x801'c92c 0x400 Data Gb arm_common_tables.o [3]
twiddleCoef_rfft_32 0x801'e594 0x80 Data Gb arm_common_tables.o [3]
twiddleCoef_rfft_256 0x801'd634 0x400 Data Gb arm_common_tables.o [3]
twiddleCoef_rfft_32 0x801'f930 0x80 Data Gb arm_common_tables.o [3]
twiddleCoef_rfft_4096 0x800'c1d8 0x4000 Data Gb arm_common_tables.o [3]
twiddleCoef_rfft_512 0x801'bd2c 0x800 Data Gb arm_common_tables.o [3]
twiddleCoef_rfft_64 0x801'e414 0x100 Data Gb arm_common_tables.o [3]
twiddleCoef_rfft_64 0x801'f7b0 0x100 Data Gb arm_common_tables.o [3]
[1] = C:\Users\vadychka\Documents\GitHub\leybl\fft\Debug\Obj
@@ -557,9 +591,9 @@ twiddleCoef_rfft_64 0x801'e414 0x100 Data Gb arm_common_tables.o [3]
[5] = rt7M_tl.a
[6] = shb_l.a
3'476 bytes of readonly code memory
8'452 bytes of readonly code memory
122'028 bytes of readonly data memory
4'216 bytes of readwrite data memory
9'388 bytes of readwrite data memory
Errors: none
Warnings: none
Debug/Obj/dsp_manager.o
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Debug/Obj/imu.o
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Debug/Obj/main.o
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Debug/Obj/startup_stm32g431xx.o
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drone_par_on_gx_up.py
+133
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@@ -0,0 +1,133 @@
import serial
import struct
import numpy as np
import matplotlib.pyplot as plt
from matplotlib.animation import FuncAnimation
from matplotlib.ticker import MultipleLocator
# --- НАСТРОЙКИ ---
PORT = 'COM3'
BAUD = 921600
FS = 1000
SAMPLES = 512
PACKET_SIZE = 12 # Изменено: 2(AA BB) + 2(gx) + 2(fgx) + 2(f1) + 2(f2) + 2(f3)
try:
ser = serial.Serial(PORT, BAUD, timeout=0.01)
ser.set_buffer_size(rx_size=12800, tx_size=12800)
ser.reset_input_buffer()
print(f"Подключено к {PORT}. Ожидание данных (12-байтные пакеты)...")
except Exception as e:
print(f"Ошибка порта: {e}")
exit()
# Буферы данных
raw_buffer = np.zeros(SAMPLES)
filt_buffer = np.zeros(SAMPLES)
peak_freqs = [0, 0, 0] # Для хранения частот из STM32
data_packet = bytearray()
fig, (ax1, ax2) = plt.subplots(2, 1, figsize=(10, 8))
# 1. Временной график
line_raw, = ax1.plot(raw_buffer, color='red', lw=2.5, alpha=0.3, label='Грязный (Raw)')
line_filt, = ax1.plot(filt_buffer, color='blue', lw=1.2, label='FMAC Фильтр')
ax1.set_title("Осциллограф: Гироскоп X")
ax1.set_ylim(-2000, 2000)
ax1.legend(loc='upper right')
ax1.grid(True, alpha=0.3)
# Текст для отображения частот на графике
peak_text = ax1.text(0.02, 0.95, '', transform=ax1.transAxes, verticalalignment='top',
bbox=dict(boxstyle='round', facecolor='white', alpha=0.7), fontsize=12, color='darkgreen')
# 2. Частотный график
freqs = np.fft.rfftfreq(SAMPLES, 1/FS)
line_spec_filt, = ax2.plot(freqs, np.zeros(len(freqs)), color='blue', lw=1.5, label='Спектр (После фильтров)', zorder=10)
fill_poly = None
# Вертикальные линии для визуализации работы Notch-фильтров
peak_lines = [ax2.axvline(0, color='green', linestyle='--', alpha=0.0) for _ in range(3)]
ax2.set_title("Частотный анализ (FFT)")
ax2.set_xlabel("Частота (Гц)")
ax2.set_xlim(0, 500)
ax2.set_ylim(0, 30000)
ax2.xaxis.set_major_locator(MultipleLocator(50))
ax2.grid(True, alpha=0.3)
def update(frame):
global raw_buffer, filt_buffer, data_packet, fill_poly, peak_freqs
new_data = ser.read_all()
if new_data:
data_packet.extend(new_data)
# Парсинг пакетов (длина 12)
while len(data_packet) >= PACKET_SIZE:
header_idx = data_packet.find(b'\xaa\xbb')
if header_idx == -1:
data_packet.clear()
break
if header_idx + PACKET_SIZE <= len(data_packet):
# Читаем: 2(gx), 2(fgx), 2(f1), 2(f2), 2(f3)
chunk = data_packet[header_idx+2 : header_idx+PACKET_SIZE]
try:
# <hhHHH -> int16, int16, uint16, uint16, uint16
r_val, f_val, f1, f2, f3 = struct.unpack('<hhHHH', chunk)
raw_buffer[:-1] = raw_buffer[1:]
raw_buffer[-1] = r_val
filt_buffer[:-1] = filt_buffer[1:]
filt_buffer[-1] = f_val
peak_freqs = [f1, f2, f3]
except Exception as e:
print(f"Unpack error: {e}")
del data_packet[:header_idx+PACKET_SIZE]
else:
break
# Обновление временных линий
line_raw.set_ydata(raw_buffer)
line_filt.set_ydata(filt_buffer)
# Обновление текста с частотами
peak_text.set_text(f"Notch 1: {peak_freqs[0]} Hz\nNotch 2: {peak_freqs[1]} Hz\nNotch 3: {peak_freqs[2]} Hz")
# FFT
sig_r = raw_buffer - np.mean(raw_buffer)
sig_f = filt_buffer - np.mean(filt_buffer)
fft_r = np.abs(np.fft.rfft(sig_r))
fft_f = np.abs(np.fft.rfft(sig_f))
line_spec_filt.set_ydata(fft_f)
# Обновление вертикальных линий (показываем где фильтры)
for i in range(3):
if peak_freqs[i] > 0:
peak_lines[i].set_xdata([peak_freqs[i], peak_freqs[i]])
peak_lines[i].set_alpha(0.6)
else:
peak_lines[i].set_alpha(0.0)
if fill_poly:
fill_poly.remove()
fill_poly = ax2.fill_between(freqs, 0, fft_r, color='red', alpha=0.15, zorder=1)
# Автомасштаб спектра
#m = np.max(fft_r) if len(fft_r) > 0 else 5000
#curr_limit = ax2.get_ylim()[1]
#if m > curr_limit:
# ax2.set_ylim(0, m * 1.2)
#elif m < curr_limit * 0.2 and curr_limit > 5000:
# ax2.set_ylim(0, 5000)
return line_raw, line_filt, line_spec_filt, peak_text
ani = FuncAnimation(fig, update, interval=30, cache_frame_data=False)
plt.tight_layout()
plt.show()
ser.close()
dsp_manager.c
+67 -18
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@@ -15,6 +15,13 @@ uint8_t dsp_buffer_ready = 0;
// Структура БПФ из библиотеки
static arm_rfft_fast_instance_f32 fft_handler;
// Частоты текущих 3 подавляющих фильтров
float active_notch_freqs[3] = {0.0f, 0.0f, 0.0f};
//альфа
static float32_t smoothed_freqs[3] = {0.0f, 0.0f, 0.0f};
#define FREQ_ALPHA 0.05f // Чем МЕНЬШЕ значение, тем дольше фильтр "едет" к новой частоте
void DSP_Init(void) {
// Инициализируем структуру БПФ
arm_rfft_fast_init_f32(&fft_handler, FFT_SIZE);
@@ -46,28 +53,74 @@ void DSP_Process(void) {
// 3. Считаем амплитуды
arm_cmplx_mag_f32(fft_output, magnitudes, FFT_SIZE / 2);
// 4. Поиск 3-х самых мощных пиков
// 4. Поиск 3-х независимых самых мощных пиков
float32_t top_freq_indices[3] = {0};
float32_t top_mags[3] = {0};
for (uint32_t i = 50; i < 450; i++) {
if (magnitudes[i] > top_mags[0]) {
top_mags[2] = top_mags[1]; top_freq_indices[2] = top_freq_indices[1];
top_mags[1] = top_mags[0]; top_freq_indices[1] = top_freq_indices[0];
top_mags[0] = magnitudes[i];
top_freq_indices[0] = (float32_t)i;
// Индексы для поиска от 50 Гц до 450 Гц
// index = freq * FFT_SIZE / fs = freq * 512 / 1000
uint32_t start_idx = 25; // ~50 Гц (50 * 512 / 1000 = 25)
uint32_t end_idx = 230; // ~450 Гц (450 * 512 / 1000 = 230)
for (int k = 0; k < 3; k++) {
float32_t max_m = 0;
uint32_t max_i = 0;
// Ищем глобальный максимум
for (uint32_t i = start_idx; i < end_idx; i++) {
if (magnitudes[i] > max_m) {
max_m = magnitudes[i];
max_i = i;
}
}
top_mags[k] = max_m;
top_freq_indices[k] = (float32_t)max_i;
// "Зануляем" гору вокруг найденного пика (±10 бинов, ~±20 Гц)
// Чтобы следующий фильтр не прицепился к «склону» того же самого пика
if (max_i > 0) {
uint32_t clear_start = (max_i > 10) ? (max_i - 10) : 0;
uint32_t clear_end = (max_i + 10 < (FFT_SIZE / 2)) ? (max_i + 10) : ((FFT_SIZE / 2) - 1);
for (uint32_t j = clear_start; j <= clear_end; j++) {
magnitudes[j] = 0.0f;
}
}
}
// --- 5. ПЕРЕНАСТРОЙКА ТРЕХ КАСКАДОВ FMAC ---
const float fs = 1000.0f; // Частота дискретизации
const float Q = 1.5f; // Добротность (ширина выреза, 1.0 - 2.0 норм)
const float Q = 3.5f; // Добротность
const float bin_to_hz = fs / (float)FFT_SIZE;
for (int i = 0; i < 3; i++) {
// Если амплитуда выше порога, настраиваем фильтр
if (top_mags[i] > 3.0f) {
float real_freq = top_freq_indices[i] * bin_to_hz;
float mag = top_mags[i];
float new_freq = top_freq_indices[i] * bin_to_hz;
// Hysteresis (ГИСТЕРЕЗИС):
// Если фильтр сейчас ВЫКЛЮЧЕН (active_notch_freqs == 0)
if (active_notch_freqs[i] == 0) {
if (mag > 4000.0f) {
// Включаем фильтр! Чтобы не полз с нуля, присваиваем частоту сразу:
smoothed_freqs[i] = new_freq;
active_notch_freqs[i] = new_freq;
}
}
// Если фильтр сейчас ВКЛЮЧЕН
else {
if (mag < 2000.0f) {
// Выключаем фильтр, так как амплитуда сильно упала
active_notch_freqs[i] = 0;
} else {
// Продолжаем отслеживать с Альфой (EMA)
smoothed_freqs[i] = (smoothed_freqs[i] * (1.0f - FREQ_ALPHA)) + (new_freq * FREQ_ALPHA);
active_notch_freqs[i] = smoothed_freqs[i];
}
}
// Применяем настройки
if (active_notch_freqs[i] > 0) {
float real_freq = active_notch_freqs[i];
// Математика Notch-фильтра
float w0 = 2.0f * 3.14159265f * real_freq / fs;
@@ -75,8 +128,6 @@ void DSP_Process(void) {
float cosw0 = arm_cos_f32(w0);
float a0 = 1.0f + alpha;
// Коэффициенты для передачи в FMAC
// Мы делим на a0 сразу здесь
float b0 = 1.0f / a0;
float b1 = -2.0f * cosw0 / a0;
float b2 = 1.0f / a0;
@@ -84,13 +135,11 @@ void DSP_Process(void) {
float a2 = (1.0f - alpha) / a0;
Update_FMAC_Coeffs(i, b0, b1, b2, a1, a2);
}
else {
// Если пика нет, ставим фильтр в режим Bypass (пропускает сигнал без изменений)
// b0 = 1.0, остальные 0. Это даст y[n] = 1.0 * x[n]
} else {
// Bypass
Update_FMAC_Coeffs(i, 1.0f, 0.0f, 0.0f, 0.0f, 0.0f);
}
}
dsp_buffer_ready = 0; // Разрешаем новый сбор данных
}
}
dsp_manager.h
+2
View File
@@ -13,5 +13,7 @@ void DSP_Process(void); // Запустить расчет (ког
// Флаг готовности данных (чтобы main знал, когда пора вызывать Process)
extern uint8_t dsp_buffer_ready;
// Список частот, которые в данный момент подавляются фильтрами
extern float active_notch_freqs[3];
#endif
imu.c
+66 -31
View File
@@ -30,6 +30,22 @@ float gyro_bias_x = 0;
// notch1, notch2, notch3 удалены (заменены на notch_fmac_coeffs[3])
// biquad_apply и biquad_init_notch удалены (больше не нужны с FMAC)
#define M_PI 3.14159265358979323846f
void biquad_init_notch(biquad_t *f, float freq, float q, float fs) {
float omega = 2.0f * M_PI * freq / fs;
float alpha = sinf(omega) / (2.0f * q);
float a0 = 1.0f + alpha;
f->b0 = 1.0f / a0;
f->b1 = -2.0f * cosf(omega) / a0;
f->b2 = 1.0f / a0;
f->a1 = -2.0f * cosf(omega) / a0;
f->a2 = (1.0f - alpha) / a0;
f->d1 = 0;
f->d2 = 0;
}
fmac_coeffs_t notch_fmac_coeffs[3];
fmac_state_t notch_fmac_state[3];
@@ -87,6 +103,18 @@ static void IMU_WriteReg(uint8_t reg, uint8_t val) {
void IMU_SetBank(uint8_t bank) { IMU_WriteReg(0x7F, (bank & 0x03) << 4); }
float biquad_apply(biquad_t *f, float x) {
// Реализация Direct Form II (правильная математика для IIR)
float w = x - f->a1 * f->d1 - f->a2 * f->d2;
float y = f->b0 * w + f->b1 * f->d1 + f->b2 * f->d2;
f->d2 = f->d1;
f->d1 = w;
return y;
}
// 3 динамических каскада
biquad_t dyn_notch_filters[3];
void IMU_Init(void) {
// Пробуждение...
IMU_SetBank(0);
@@ -95,22 +123,25 @@ void IMU_Init(void) {
IMU_WriteReg(0x07, 0x00);
IMU_SetBank(2);
IMU_WriteReg(0x01, 0x01); // Bypass (отключаем встроенный фильтр для анализа)
// ICM-20948: GYRO_CONFIG_1 находится в нулевом регистре второго банка.
// Значение GYRO_DLPFCFG = 7 для макс. ширины без полного байпаса: ~361.4 Hz LPF.
// (0 - это 196Hz, 1 - 151Hz, 2 - 119Hz, 3 - 51Hz, 7 - 361.4Hz)
// GYRO_FS_SEL = 3 (2000 dps)
// ВНИМАНИЕ: На ICM-20948 бит GYRO_FCHOICE (бит 0) включает LPF, если равен 1! (а 0 = Bypass)
IMU_WriteReg(0x01, (7 << 3) | (3 << 1) | 1);
IMU_SetBank(0);
// b0 = 1.0 (в Q14 это 16384), остальные 0
// Инициализируем фильтры в режиме Bypass (пропускание)
for (int i = 0; i < 3; i++) {
notch_fmac_coeffs[i].b0 = 0;
notch_fmac_coeffs[i].b1 = 0;
notch_fmac_coeffs[i].b2 = 0;
notch_fmac_coeffs[i].a1 = 0;
notch_fmac_coeffs[i].a2 = 0;
notch_fmac_state[i].x1 = 0;
notch_fmac_state[i].x2 = 0;
notch_fmac_state[i].y1 = 0;
notch_fmac_state[i].y2 = 0;
}
dyn_notch_filters[i].b0 = 1.0f;
dyn_notch_filters[i].b1 = 0;
dyn_notch_filters[i].b2 = 0;
dyn_notch_filters[i].a1 = 0;
dyn_notch_filters[i].a2 = 0;
dyn_notch_filters[i].d1 = 0;
dyn_notch_filters[i].d2 = 0;
}
}
void IMU_Calibrate(void) {
@@ -127,30 +158,34 @@ void IMU_ReadRawData(void) {
uint8_t buf[14];
I2C_ReadMulti(IMU_ADDR, 0x2D, buf, 14);
raw_gx = (int16_t)(buf[6] << 8 | buf[7]);
float x = (float)raw_gx - gyro_bias_x;
// 1. Читаем сырое
int16_t gyro_x_raw = (int16_t)(buf[6] << 8 | buf[7]);
// 2. Центрируем относительно нуля (убираем дрейф)
float x = (float)gyro_x_raw - gyro_bias_x;
// 3. СОХРАНЯЕМ это в raw_gx (это будет красная линия в Python)
raw_gx = (int16_t)x;
// ВМЕСТО ЭТОГО:
// x = biquad_apply(&notch1, x);
// x = biquad_apply(&notch2, x);
// x = biquad_apply(&notch3, x);
// 4. Прогоняем через 3 каскада программных фильтров (режекторные)
float x_filtered = x;
x_filtered = biquad_apply(&dyn_notch_filters[0], x_filtered);
x_filtered = biquad_apply(&dyn_notch_filters[1], x_filtered);
x_filtered = biquad_apply(&dyn_notch_filters[2], x_filtered);
// ТЕПЕРЬ:
x = FMAC_Process_Sample(x);
filt_gx = x;
// 5. Сохраняем в filt_gx (это будет синяя линия)
filt_gx = x_filtered;
}
void Update_FMAC_Coeffs(int stage, float b0, float b1, float b2, float a1, float a2) {
if (stage < 0 || stage > 2) return;
const float scale = 16384.0f; // Q14
notch_fmac_coeffs[stage].b0 = (int16_t)(b0 * scale);
notch_fmac_coeffs[stage].b1 = (int16_t)(b1 * scale);
notch_fmac_coeffs[stage].b2 = (int16_t)(b2 * scale);
// Для FMAC знаки a1 и a2 инвертируем!
notch_fmac_coeffs[stage].a1 = (int16_t)(-a1 * scale);
notch_fmac_coeffs[stage].a2 = (int16_t)(-a2 * scale);
// Обновляем софтверные фильтры вместо FMAC
dyn_notch_filters[stage].b0 = b0;
dyn_notch_filters[stage].b1 = b1;
dyn_notch_filters[stage].b2 = b2;
dyn_notch_filters[stage].a1 = a1;
dyn_notch_filters[stage].a2 = a2;
}
// Внутренняя функция для обработки одного каскада через FMAC
@@ -178,7 +213,7 @@ static int16_t FMAC_Step(fmac_coeffs_t *c, fmac_state_t *s, int16_t input) {
FMAC->WDATA = input;
uint32_t timeout = 1000;
while (!(FMAC->SR & 0x01) && --timeout);
while ((FMAC->SR & 0x01) && --timeout);
if (timeout == 0) return input;
imu.h
+5 -2
View File
@@ -10,8 +10,11 @@ typedef struct {
float d1, d2;
} biquad_t;
// Старые фильтры notch1,2,3 удалены (использовалась только FMAC с notch_fmac_coeffs[3])
// extern biquad_t notch1, notch2, notch3;
// 3 динамических программных фильтра (вместо FMAC)
extern biquad_t dyn_notch_filters[3];
void biquad_init_notch(biquad_t *f, float freq, float q, float fs);
float biquad_apply(biquad_t *f, float x);
// Прототипы
void I2C1_Init(void);
main.c
+29 -17
View File
@@ -11,11 +11,15 @@ volatile uint32_t m2_speed = 900;
volatile uint32_t m3_speed = 900;
volatile uint32_t m4_speed = 900;
// В main.c меняем структуру
#pragma pack(push, 1)
typedef struct {
uint8_t header[2];
int16_t gx;
int16_t filt_gx;
uint8_t header[2]; // 0xAA, 0xBB
int16_t gx; // Сырой гиро
int16_t filt_gx; // Отфильтрованный гиро
uint16_t freq1; // Пик 1 (Гц)
uint16_t freq2; // Пик 2 (Гц)
uint16_t freq3; // Пик 3 (Гц)
} Telemetry_t;
#pragma pack(pop)
@@ -49,22 +53,30 @@ int main(void) {
pkt.header[0] = 0xAA; pkt.header[1] = 0xBB;
while (1) {
if (imu_flag) {
imu_flag = 0;
// В основном цикле while(1) внутри if (imu_flag)
while (1) {
if (imu_flag) {
imu_flag = 0;
IMU_ReadRawData();
DSP_AddSample((float32_t)raw_gx);
pkt.gx = raw_gx;
pkt.filt_gx = (int16_t)filt_gx;
// Заполняем частоты из dsp_manager.c
// extern float active_notch_freqs[3]; // Если компилятор не видит, добавьте в заголовок
pkt.freq1 = (uint16_t)active_notch_freqs[0];
pkt.freq2 = (uint16_t)active_notch_freqs[1];
pkt.freq3 = (uint16_t)active_notch_freqs[2];
IMU_ReadRawData(); // Теперь она внутри себя вызывает FMAC_Process_Sample
pkt.gx = raw_gx;
pkt.filt_gx = (int16_t)filt_gx; // filt_gx обновится внутри IMU_ReadRawData
UART_SendPacket(&pkt);
Set_Motor_Individual(m1_speed, m2_speed, m3_speed, m4_speed);
}
UART_SendPacket(&pkt);
Set_Motor_Individual(m1_speed, m2_speed, m3_speed, m4_speed);
}
if (dsp_buffer_ready) {
DSP_Process();
}
}
}
// 4. РЕАЛИЗАЦИЯ ФУНКЦИЙ (Тут был провал - их не хватало!)
settings/fft_az.dnx
+1 -1
View File
@@ -25,7 +25,7 @@
<ShowSource>1</ShowSource>
</Trace1>
<DebugChecksum>
<Checksum>757690107</Checksum>
<Checksum>919959831</Checksum>
</DebugChecksum>
<Disassembly>
<MixedMode>1</MixedMode>
settings/fft_az.reggroups
+1
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@@ -0,0 +1 @@

settings/fft_az.wsdt
+30 -30
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File diff suppressed because one or more lines are too long
top_mags[1])
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top_mags[2])
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